參數(shù)資料
型號: MCZ33880EG
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Configurable Octal Serial Switch with Serial Peripheral Interface I/O
中文描述: 配置八路系列開關串行外設接口的I / O
文件頁數(shù): 15/25頁
文件大小: 341K
代理商: MCZ33880EG
Analog Integrated Circuit Device Data
Freescale Semiconductor
15
33880
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
MCU INTERFACE DESCRIPTION
In operation, the 33880 functions as an eight-output serial
switch serving as a microcontroller (MCU) bus expander and
buffer, with fault management and fault reporting features. In
doing so, the device directly relieves the MCU of the fault
management functions. This device directly interfaces to an
MCU using a Serial Peripheral Interface (SPI) for control and
diagnostic readout.
Figure 21
and
Figure 24
, page
16
,
illustrate the basic SPI configuration between an MCU and
one 33880.
Figure 21. SPI Interface with Microcontroller
All inputs are compatible with 5.0 V and 3.3 V CMOS logic
levels and incorporate positive logic. Whenever an input is
programmed to a logic low state (<0.8 V) the corresponding
output will be OFF. Conversely, whenever an input is
programmed to a logic high state (>2.2 V), the output being
controlled will be ON. Diagnostics are treated in a similar
manner. Outputs with a fault will feedback (via DO) to the
microcontroller as a logic [1] while normal operating outputs
will provide a logic [0].
Figure 22
illustrates the Daisy Chain configuration using
the 33880. Data from the MCU is clocked daisy chain through
each device while the Chip Select (
CS
) bit is commanded low
by the MCU. During each clock cycle output status from the
daisy chain, the 33880 is being transferred to the MCU via the
Master In Slave Out (MISO) line. On rising edge of
CS
data
stored in the input register is then transferred to the output
driver.
Figure 22. 33880 SPI System Daisy Chain
Multiple 33880 devices can be controlled in a parallel input
fashion using the SPI.
Figure 23
illustrates 24 loads being
controlled by three dedicated parallel MCU ports used for
chip select.
Figure 23. Parallel Input SPI Control
Receive
Buffer
Parallel
Ports
To
Logic
33880
MC68HCxx
Microcontroller
DO
DI
CS
SCLK
MISO
MOSI
Shift Regist
er
Shift Register
MC68xx
MCU
with
SPI
Interface
8 Outputs
8 Outputs
8 Outputs
CS
MISO
MOSI
Parallel Port
SCLK
DO
DI
DO
DI
DO
DI
CS
CS
SCLK
SCLK
33880
33880
33880
DI
SCLK
DO
CS
Parallel
Ports
MOSI
SCLK
MISO
8 Outputs
MC68xx
Microcontroller
SPI
A
B
C
DI
SCLK
DO
CS
8 Outputs
DI
SCLK
DO
CS
8 Outputs
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