參數(shù)資料
型號： MCP6V28T-E/SN
廠商： Microchip Technology
文件頁數(shù)： 15/50頁
文件大小： 0K
描述： IC OPAMP AUTO-ZERO SGL 8SOIC
標準包裝： 3,300
放大器類型： 自動調(diào)零
電路數(shù)： 1
輸出類型： 滿擺幅
轉換速率： 1 V/µs
增益帶寬積： 2MHz
電流 - 輸入偏壓： 7pA
電壓 - 輸入偏移： 2µV
電流 - 電源： 620µA
電流 - 輸出 / 通道： 22mA
電壓 - 電源，單路/雙路(±)： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應商設備封裝： 8-SOICN
包裝： 帶卷 (TR)
MCP6V26/7/8
DS25007B-page 22
2011 Microchip Technology Inc.
4.1.2
AUTO-ZEROING ACTION
Figure 4-2 shows the connections between amplifiers
during the Normal Mode of operation (
φ1). The hold
capacitor (CH) corrects the Null Amplifier’s input offset.
Since the Null Amplifier has very high gain, it
dominates the signal seen by the Main Amplifier. This
greatly reduces the impact of the Main Amplifier’s input
offset voltage on overall performance. Essentially, the
Null Amplifier and Main Amplifier behave as a regular
op amp with very high gain (AOL) and very low offset
voltage (VOS).
FIGURE 4-2:
Normal Mode of Operation (
φ
1); Equivalent Amplifier Diagram.
Figure 4-3 shows the connections between amplifiers
during the Auto-zeroing Mode of operation (
φ2). The
signal goes directly through the Main Amplifier, and the
flywheel capacitor (CFW) maintains a constant correc-
tion on the Main Amplifier’s offset.
The Null Amplifier uses its own high open loop gain to
drive the voltage across CH to the point where its input
offset voltage is almost zero. Because the signal input
pair is connected to VIN+, the auto-zeroing action
corrects the offset at the current common mode input
voltage (VCM) and supply voltage (VDD). This makes
the DC CMRR and PSRR very high also.
Since these corrections happen every 40 s, or so, we
also minimize slow errors, including offset drift with
temperature (
ΔVOS/ΔTA), 1/f noise, and input offset
aging.
FIGURE 4-3:
Auto-zeroing Mode of Operation (
φ
2); Equivalent Diagram.
4.1.3
INTERMODULATION DISTORTION
(IMD)
The MCP6V26/7/8 op amps will show intermodulation
distortion (IMD), products when an AC signal is
present.
The signal and clock can be decomposed into sine
wave tones (Fourier series components). These tones
interact with the auto-zeroing circuitry’s non-linear
response to produce IMD tones at sum and difference
frequencies. Each of the square wave clock’s
harmonics has a series of IMD tones centered on it.
VIN+
VIN–
Main
Output
VOUT
VREF
Amp.
Buffer
NC
Null
Amp.
CH
CFW
VIN+
VIN–
Main
Output
VOUT
VREF
Amp.
Buffer
NC
Null
Amp.
CH
CFW
相關PDF資料
PDF描述
TSW-140-25-T-S-RA CONN HEADER 40POS .100" SNGL R/A
MCP6V28T-E/MS IC OPAMP AUTO-ZERO SGL 8SOIC
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MTLW-107-05-G-D-170 CONN HEADER 14POS 1.00" DL GOLD
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