參數(shù)資料
型號： MCP4541T-103E/MS
廠商： Microchip Technology
文件頁數(shù)： 67/92頁
文件大?。?/td> 0K
描述： IC POT DGTL 10K SGL 8-MSOP
標(biāo)準(zhǔn)包裝： 2,500
接片： 129
電阻（歐姆）： 10k
電路數(shù)： 1
溫度系數(shù)： 標(biāo)準(zhǔn)值 150 ppm/°C
存儲器類型： 非易失
接口： I²C（設(shè)備位址）
電源電壓： 2.7 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-TSSOP，8-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 8-MSOP
包裝： 帶卷 (TR)
2008 Microchip Technology Inc.
DS22107A-page 7
MCP454X/456X/464X/466X
Full-Scale Error
(MCP4XX1 only)
(8-bit code = 100h,
7-bit code = 80h)
VWFSE
-6.0
-0.1
—
LSb
5 k
Ω
8-bit
3.0V
≤ V
DD ≤ 5.5V
-4.0
-0.1
—
LSb
7-bit
3.0V
≤ V
DD ≤ 5.5V
-3.5
-0.1
—
LSb
10 k
Ω
8-bit
3.0V
≤ V
DD ≤ 5.5V
-2.0
-0.1
—
LSb
7-bit
3.0V
≤ V
DD ≤ 5.5V
-0.8
-0.1
—
LSb
50 k
Ω
8-bit
3.0V
≤ V
DD ≤ 5.5V
-0.5
-0.1
—
LSb
7-bit
3.0V
≤ V
DD ≤ 5.5V
-0.5
-0.1
—
LSb
100 k
Ω 8-bit
3.0V
≤ V
DD ≤ 5.5V
-0.5
-0.1
—
LSb
7-bit
3.0V
≤ V
DD ≤ 5.5V
Zero-Scale Error
(MCP4XX1 only)
(8-bit code = 00h,
7-bit code = 00h)
VWZSE
—+0.1
+6.0
LSb
5 k
Ω
8-bit
3.0V
≤ V
DD ≤ 5.5V
—
+0.1
+3.0
LSb
7-bit
3.0V
≤ V
DD ≤ 5.5V
—
+0.1
+3.5
LSb
10 k
Ω
8-bit
3.0V
≤ V
DD ≤ 5.5V
—
+0.1
+2.0
LSb
7-bit
3.0V
≤ V
DD ≤ 5.5V
—
+0.1
+0.8
LSb
50 k
Ω
8-bit
3.0V
≤ V
DD ≤ 5.5V
—
+0.1
+0.5
LSb
7-bit
3.0V
≤ V
DD ≤ 5.5V
—
+0.1
+0.5
LSb
100 k
Ω 8-bit
3.0V
≤ V
DD ≤ 5.5V
—
+0.1
+0.5
LSb
7-bit
3.0V
≤ V
DD ≤ 5.5V
Potentiometer
Integral
Non-linearity
INL
-1
±0.5
+1
LSb
8-bit
3.0V
≤ V
DD ≤ 5.5V
MCP4XX1 devices only
-0.5
±0.25
+0.5
LSb
7-bit
Potentiometer
Differential
Non-linearity
DNL
-0.5
±0.25
+0.5
LSb
8-bit
3.0V
≤ V
DD ≤ 5.5V
MCP4XX1 devices only
-0.25
±0.125
+0.25
LSb
7-bit
AC/DC CHARACTERISTICS (CONTINUED)
DC Characteristics
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
–40°C
≤ T
A ≤ +125°C (extended)
All parameters apply across the specified operating ranges unless noted.
VDD = +2.7V to 5.5V, 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ devices.
Typical specifications represent values for VDD = 5.5V, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Note 1:
Resistance is defined as the resistance between terminal A to terminal B.
2:
INL and DNL are measured at VW with VA = VDD and VB = VSS.
3:
MCP4XX1 only.
4:
MCP4XX2 only, includes VWZSE and VWFSE.
5:
Resistor terminals A, W and B’s polarity with respect to each other is not restricted.
6:
This specification by design.
7:
Non-linearity is affected by wiper resistance (RW), which changes significantly overvoltage and
temperature.
8:
The MCP4XX1 is externally connected to match the configurations of the MCP45X2 and MCP46X2, and
then tested.
9:
POR/BOR is not rate dependent.
10: Supply current is independent of current through the resistor network
11: When HVC/A0 = VIHH, the IDD current is less due to current into the HVC/A0 pin. See IPU specification
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