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| 型號(hào)： | MCP4261T-104E/SL |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 47/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT 100K 2CH 14SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,600 |
| 系列： | WiperLock™ |
| 接片： | 257 |
| 電阻（歐姆）： | 100k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 150 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | 4 線 SPI（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | MCP4261T-104-E/SL MCP4261T-104-E/SLTR MCP4261T-104-E/SLTR-ND MCP4261T-104E/SLTR |
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2008 Microchip Technology Inc.
DS22059B-page 51
MCP414X/416X/424X/426X
7.6
Read Data
Normal and High Voltage
The Read command is a 16-bit command. The Read
Command can be issued to both the Volatile and
Non-Volatile memory locations. The format of the
command is shown in Figure 7-4.
The first 6-bits of the Read command determine the
address and the command. The 7th clock will output
the CMDERR bit on the SDO pin. The remaining
9-clocks the device will transmit the 9 data bits (D8:D0)
of the specified address (AD3:AD0).
Figure 7-4 shows the SDI and SDO information for a
Read command.
During a write cycle (Write or High Voltage Write to a
Non-Volatile memory location) the Read command can
only read the Volatile memory locations. By reading the
Status Register (04h), the Host Controller can
determine when the write cycle has completed (via the
state of the EEWA bit).
7.6.1
SINGLE READ
The read operation requires that the CS pin be in the
active state (VILor VIHH). Typically, the CS pin will be in
the inactive state (VIH) and is driven to the active state
(VILor VIHH). The 16-bit Read Command (Command
Byte and Data Byte) is then clocked in on the SCK and
SDI pins. The SDO pin starts driving data on the 7th bit
(CMDERR bit) and the addressed data comes out on
the 8th through 16th clocks. Figure 6-3 through
Figure 6-6 show possible waveforms for a single read.
Figure 6-5 and Figure 6-6 show the single read
waveforms when the SDI and SDO signals are
multiplexed on the same pin. For additional information
on the multiplexing of these signals, refer to
FIGURE 7-4:
Read Command - SDI and SDO States.
A
D
3
A
D
2
A
D
1
A
D
0
1
XXXXXXXXXX
1111111
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Valid Address/Command combination
1111110000000000 Attempted Non-Volatile Memory Read
during Non-Volatile Memory Write Cycle
COMMAND BYTE
DATA BYTE
SDI
SDO
READ DATA
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