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| 型號： | MCP4141T-502E/SN |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 52/88頁 |
| 文件大小： | 0K |
| 描述： | IC POT DGTL SNGL 5K SPI 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 系列： | WiperLock™ |
| 接片： | 129 |
| 電阻（歐姆）： | 5k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 150 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 3 線 SPI（芯片選擇） |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
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MCP414X/416X/424X/426X
DS22059B-page 56
2008 Microchip Technology Inc.
7.8.2
CONTINUOUS DECREMENTS
Continuous Decrements are possible only when writing
to the volatile memory registers (address 00h, 01h, and
04h).
Figure 7-9 shows a continuous Decrement sequence
for three continuous writes. The writes do not need to
be to the same volatile memory address.
When executing an continuous Decrement commands,
the selected wiper will be altered from n to n-1 for each
Decrement command received. The wiper value will
decrement from the wipers Full Scale value (100h on
8-bit devices and 80h on 7-bit devices). Above the
wipers Full-Scale value (8-bit =101h to 1FFh,
7-bit = 81h to FFh), the decrement command is
disabled. If the Wiper register has a Zero Scale value
(000h), then the wiper value will not decrement. See
Table 7-4 for additional information on the Decrement
Command vs. the current volatile wiper value.
Decrement commands can be sent repeatedly without
raising CS until a desired condition is met. The value in
the Volatile Wiper register can be read using a Read
Command
and
written
to
the
corresponding
Non-Volatile Wiper EEPROM using a Write Command.
When executing a continuous command string, The
Decrement command can be followed by any other
valid command.
The wiper terminal will move after the command has
been received (8th clock).
After the wiper is decremented to the desired position,
the CS pin should be forced to VIH to ensure that
“unexpected” transitions (on the SCK pin do not cause
the wiper setting to change). Driving the CS pin to VIH
should occur as soon as possible (within device
specifications) after the last desired decrement occurs.
FIGURE 7-9:
Continuous Decrement Command - SDI and SDO States.
A
D
3
A
D
2
A
D
1
A
D
0
1
0
XXA
D
3
A
D
2
A
D
1
A
D
0
1
0
XXA
D
3
A
D
2
A
D
1
A
D
0
10
X X
111111 1* 11
11111 1* 1111111 1* 1 Note 1, 2
111111
0
0 Note 3, 4
111111111
11111
0
0 Note 3, 4
111111111
1111111111111
0
0 Note 3, 4
(DECR COMMAND (n-1) )
SDI
SDO
COMMAND BYTE
Note 1:
Only functions when writing the volatile wiper registers (AD3:AD0) 0h and 1h.
2:
Valid Address/Command combination.
3:
Invalid Address/Command combination.
4:
If an Error Condition occurs (CMDERR = L), all following SDO bits will be low until the CMDERR
condition is cleared (the CS pin is forced to the inactive state).
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