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| 型號： | MCP4141T-502E/SN |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 30/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POT DGTL SNGL 5K SPI 8SOIC |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 系列： | WiperLock™ |
| 接片： | 129 |
| 電阻（歐姆）： | 5k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 150 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 3 線 SPI（芯片選擇） |
| 電源電壓： | 1.8 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
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MCP414X/416X/424X/426X
DS22059B-page 36
2008 Microchip Technology Inc.
5.2
Wiper
Each tap point (between the RS resistors) is a
connection point for an analog switch. The opposite
side of the analog switch is connected to a common
signal which is connected to the Terminal W (Wiper)
pin.
A value in the volatile wiper register selects which
analog switch to close, connecting the W terminal to
the selected node of the resistor ladder.
The wiper can connect directly to Terminal B or to
Terminal A. A zero-scale connections, connects the
Terminal W (wiper) to Terminal B (wiper setting of
000h). A full-scale connections, connects the Terminal
W (wiper) to Terminal A (wiper setting of 100h or 80h).
In these configurations the only resistance between the
Terminal W and the other Terminal (A or B) is that of the
analog switches.
A wiper setting value greater than full scale (wiper
setting of 100h for 8-bit device or 80h for 7-bit devices)
will also be a Full Scale setting (Terminal W (wiper)
connected to Terminal A). Table 5-1 illustrates the full
wiper setting map.
Equation 5-2 illustrates the calculation used to deter-
mine the resistance between the wiper and terminal B.
EQUATION 5-2:
RWB CALCULATION
TABLE 5-1:
VOLATILE WIPER VALUE VS.
WIPER POSITION MAP
5.3
WiperLock Technology
The MCP4XXX device’s WiperLock technology allows
application-specific calibration settings to be secured in
the EEPROM without requiring the use of an additional
write-protect pin. There are two WiperLock Technology
configuration bits (WL0 and WL1). These bits prevent
the Non-Volatile and Volatile addresses and bits for the
specified resistor network from being written.
The WiperLock technology prevents the serial
commands from doing the following:
Changing a volatile wiper value
Writing to a non-volatile wiper memory location
Changing the volatile TCON register value
For either Resistor Network 0 or Resistor Network 1
(Potx), the WLx bit controls the following:
Non-Volatile Wiper Register
Volatile Wiper Register
Volatile TCON register bits RxHW, RxA, RxW, and
RxB
High Voltage commands are required to enable and
disable WiperLock. Please refer to the Modify Write
command for operation.
5.3.1
POR/BOR OPERATION WHEN
WIPERLOCK TECHNOLOGY
ENABLED
The WiperLock Technology state is not affected by a
POR/BOR event. A POR/BOR event will load the
Volatile Wiper register value with the Non-Volatile
Wiper register value, refer to Section 4.1.
Wiper Setting
Properties
7-bit Pot 8-bit Pot
3FFh
081h
3FFh
101h
Reserved (Full Scale (W = A)),
Increment and Decrement
commands ignored
080h
100h
Full Scale (W = A),
Increment commands ignored
07Fh
041h
0FFh
081
W = N
040h
080h
W = N (Mid-Scale)
03Fh
001h
07Fh
001
W = N
000h
Zero Scale (W = B)
Decrement command ignored
R
WB
R
ABN
256
()
--------------R
W
+
=
N = 0 to 256 (decimal)
R
WB
R
ABN
128
()
--------------R
W
+
=
N = 0 to 128 (decimal)
8-bit Device
7-bit Device
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