參數(shù)資料
型號(hào)： MCP41100
廠商： Microchip Technology Inc.
元件分類： 數(shù)字電位計(jì)
英文描述： Single/Dual Digital Potentiometer with SPI⑩ Interface
中文描述： 單/雙數(shù)字電位器接口與SPI⑩
文件頁數(shù)： 4/33頁
文件大小： 682K
代理商： MCP41100
MCP41XXX/42XXX
DS11195C-page 4
2003 Microchip Technology Inc.
DC CHARACTERISTICS: 100 k
VERSION
Electrical Characteristics:
Unless otherwise indicated, V
= +2.7V to 5.5V, T
= -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for V
DD
= 5V, V
SS
= 0V, V
B
= 0V, T
A
= +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Rheostat Mode
Nominal Resistance
R
70
100
130
k
LSB
T
A
= +25°C
(Note 1)
Note 2
Rheostat Differential Non-Linearity
R-DNL
-1
±1/4
+1
Rheostat Integral Non-Linearity
R-INL
R
AB
/
T
R
W
R
W
I
W
R/R
-1
±1/4
+1
LSB
Note 2
Rheostat Tempco
—
800
—
ppm/°C
mA
Wiper Resistance
—
125
175
V
DD
= 5.5V, I
W
= 1 mA, code 00h
V
DD
= 2.7V, I
W
= 1 mA, code 00h
—
175
250
Wiper Current
-1
—
+1
Nominal Resistance Match
—
0.2
1
%
MCP42010 only, P0 to P1;T
A
= +25°C
Potentiometer Divider
Resolution
N
8
—
—
Bits
Monotonicity
N
8
—
—
Bits
Differential Non-Linearity
DNL
-1
±1/4
+1
LSB
Note 3
Integral Non-Linearity
INL
-1
±1/4
+1
LSB
Note 3
Voltage Divider Tempco
V
W
/
T
V
WFSE
V
WFSE
V
WZSE
V
WZSE
—
1
—
ppm/°C
Code 80h
Full-Scale Error
-1
-0.25
0
LSB
Code FFh, V
DD
= 5V, see Figure 2-25
Code FFh, V
DD
= 3V, see Figure 2-25
Code 00h, V
DD
= 5V, see Figure 2-25
Code 00h, V
DD
= 3V, see Figure 2-25
-1
-0.35
0
LSB
Zero-Scale Error
0
+0.25
+1
LSB
0
+0.35
+1
LSB
Resistor Terminals
Voltage Range
V
A,B,W
0
—
V
DD
—
Note 4
Capacitance (C
A
or C
B
)
—
11
pF
f =1 MHz, Code = 80h, see Figure 2-30
Capacitance
C
W
—
5.6
—
pF
f =1 MHz, Code = 80h, see Figure 2-30
Dynamic Characteristics (All dynamic characteristics use V
DD
= 5V.)
Bandwidth -3dB
BW
—
145
—
MHz
V
= 0V, Measured at Code 80h,
Output Load = 30
P
F
V
= V
,V
= 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
V
A
= Open, Code 80h
,
f =1 kHz
V
A
= V
DD
, V
B
= 0V
(Note 5)
Settling Time
t
S
—
18
—
μS
Resistor Noise Voltage
e
NWB
C
T
—
29
—
nV/
√
Hz
dB
Crosstalk
—
-95
—
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.
Schmitt Trigger High-Level Input Voltage
V
IH
V
IL
V
HYS
V
OL
V
OH
I
LI
C
IN
, C
OUT
0.7V
DD
—
—
—
V
Schmitt Trigger Low-Level Input Voltage
—
0.3V
DD
—
V
Hysteresis of Schmitt Trigger Inputs
—
0.05V
DD
—
Low-Level Output Voltage
—
0.40
V
I
OL
= 2.1 mA, V
DD
= 5V
I
OH
= -400 μA, V
DD
= 5V
CS = V
DD
, V
IN
= V
SS
or V
DD
, includes V
A
SHDN=0
V
DD
= 5.0V, T
A
= +25°C, f
c
= 1 MHz
High-Level Output Voltage
V
DD
- 0.5
-1
—
—
V
Input Leakage Current
—
+1
μA
Pin Capacitance (All inputs/outputs)
—
10
—
pF
Power Requirements
Operating Voltage Range
V
DD
I
DDA
2.7
—
5.5
V
Supply Current, Active
—
340
500
μA
V
= 5.5V, CS = V
, f
= 10 MHz,
SO = Open, Code FFh
(Note 6)
CS, SHDN, RS = V
DD
= 5.5V, SO = Open
(Note 6)
V
DD
= 4.5V - 5.5V, V
A
= 4.5V, Code 80h
V
DD
= 2.7V - 3.3V, V
A
= 2.7V, Code 80h
Supply Current, Static
I
DDS
PSS
—
0.01
1
μA
Power Supply Sensitivity
—
0.0015
0.0035
%/%
PSS
—
0.0015
0.0035
%/%
Note
1:
2:
V
= V
, no connection on wiper.
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I
W
= 50 μA for
V
= 3V and I
= 400 μA for V
DD
= 5V for 10 k
version. See Figure 2-26 for test circuit.
INL and DNL are measured at V
with the device configured in the voltage divider or potentiometer mode. V
= V
DD
and V
B
= 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
Measured at V
pin where the voltage on the adjacent V
pin is swinging full-scale.
Supply current is independent of current through the potentiometers.
3:
4:
5:
6:
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