參數(shù)資料
型號: MCP3553E
廠商: Microchip Technology Inc.
英文描述: Low-Power, Single-Channel 22-Bit Delta-Sigma ADCs
中文描述: 低功耗,單通道22位Δ-Σ模數(shù)轉(zhuǎn)換器
文件頁數(shù): 12/30頁
文件大?。?/td> 616K
代理商: MCP3553E
MCP3551/3
DS21950B-page 12
2005 Microchip Technology Inc.
4.0
DEVICE OVERVIEW
The MCP3551/3 devices are 22-bit delta-sigma ADCs
that include fully differential analog inputs, a third-order
delta-sigma modulator, a fourth-order modified SINC
decimation filter, an on-chip, low-noise internal oscilla-
tor, a power supply monitoring circuit and an SPI 3-wire
digital interface. These devices can be easily used to
measure low-frequency, low-level signals such as
those found in pressure transducers, temperature,
strain gauge, industrial control or process control appli-
cations. The power supply range for this product family
is 2.7V to 5.5V; the temperature range is -40°C to
+125°C. The functional block diagram for the
MCP3551/3 devices is shown in Figure 4-1.
A Power-On Reset (POR) monitoring circuit is included
to ensure proper power supply voltages during the
conversion process. The clock source for the part is
internally generated to ±0.5% over the full-power
supply voltage range and industrial temperature range.
This stable clock source allows for superior conversion
repeatability and minimal drift across conversions.
The MCP3551/3 devices employ a delta-sigma conver-
sion technique to realize up to 22 bits of no missing
code performance with 21.9 Effective Number of Bits
(ENOB).
These
devices
conversions with no digital filter settling time. Every
conversion includes an internal offset and gain
auto-calibration to reduce device error. These calibra-
tions are transparent to the user and are done in
real-time during the conversion. Therefore, these
devices do not require any additional time or
conversion to proceed, allowing easy usage of the
devices for multiplexed applications. The MCP3551/3
devices incorporate a fourth-order digital decimation
filter in order to allow superior averaging performance,
as well as excellent line frequency rejection
capabilities. The oversampling frequency also reduces
any external anti-aliasing filter requirements.
provide
single-cycle
The MCP3551/3 devices communicate with a simple
3-wire SPI interface. The interface controls the
conversion start event, with an added feature of an
auto-conversion at system power-up by tying the CS
pin to logic-low. The device can communicate with bus
speeds of up to 5 MHz, with 50 pF capacitive loading.
The interface offers two conversion modes: Single
Conversion mode for multiplexed applications and a
Continuous Conversion mode for multiple conversions
in series. Every conversion is independent of each
other. That is, all internal registers are flushed between
conversions. When the device is not converting, it auto-
matically goes into Shutdown mode and, while in this
mode, consumes less than 1 μA.
FIGURE 4-1:
MCP3551/3
Functional Block Diagram.
Internal
Oscillator
Third-Order
ΔΣ
Modulator
Digital
Decimation
Filter (SINC
4
)
SPI 3-wire
Interface
Gain and
Offset
Calibration
Differential
Analog Input
Bitstream
Conversion
Code
Output
Code
Clock
Charge
Transfer
Reference
Input
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