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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� MCP3204-BI/P
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩(sh霉)锛� 12/40闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC ADC 12BIT 2.7V 4CH SPI 14-DIP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 30
浣嶆暩(sh霉)锛� 12
閲囨ǎ鐜囷紙姣忕锛夛細 100k
鏁�(sh霉)鎿�(j霉)鎺ュ彛锛� 涓茶锛孲PI?
杞�(zhu菐n)鎻涘櫒鏁�(sh霉)鐩細 1
闆诲闆绘簮锛� 鍠浕婧�
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 閫氬瓟
灏佽/澶栨锛� 14-DIP锛�0.300"锛�7.62mm锛�
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 14-PDIP
鍖呰锛� 绠′欢
杓稿叆鏁�(sh霉)鐩拰椤炲瀷锛� 4 鍊嬪柈绔�锛屽柈妤�锛�2 鍊嬪伣宸垎锛屽柈妤�
鐢�(ch菐n)鍝佺洰閷勯爜闈細 672 (CN2011-ZH PDF)
MCP3204/3208
DS21298E-page 2
2008 Microchip Technology Inc.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings
VDD...................................................................................7.0V
All inputs and outputs w.r.t. VSS ............... -0.6V to VDD +0.6V
Storage temperature .....................................-65掳C to +150掳C
Ambient temp. with power applied ................-65掳C to +125掳C
Soldering temperature of leads (10 seconds) .............+300掳C
ESD protection on all pins.............................................> 4 kV
Notice:
Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
ELECTRICAL SPECIFICATIONS
Electrical Characteristics:
Unless otherwise noted, all parameters apply at VDD = 5V, VSS = 0V, VREF = 5V,
TA = -40掳C to +85掳C,fSAMPLE = 100 ksps and fCLK = 20*fSAMPLE
Parameters
Sym
Min
Typ
Max
Units
Conditions
Conversion Rate
Conversion Time
tCONV
鈥�
12
clock
cycles
Analog Input Sample Time
tSAMPLE
1.5
clock
cycles
Throughput Rate
fSAMPLE
鈥�
100
50
ksps
VDD = VREF = 5V
VDD = VREF = 2.7V
DC Accuracy
Resolution
12
bits
Integral Nonlinearity
INL
鈥�
卤0.75
卤1.0
卤1
卤2
LSB
MCP3204/3208-B
MCP3204/3208-C
Differential Nonlinearity
DNL
鈥�
卤0.5
卤1
LSB
No missing codes
over-temperature
Offset Error
鈥�
卤1.25
卤3
LSB
Gain Error
鈥�
卤1.25
卤5
LSB
Dynamic Performance
Total Harmonic Distortion
鈥�
-82
鈥�
dB
VIN = 0.1V to 4.9V@1 kHz
Signal to Noise and Distortion
(SINAD)
鈥�72
鈥�
dB
VIN = 0.1V to 4.9V@1 kHz
Spurious Free Dynamic
Range
鈥�86
鈥�
dB
VIN = 0.1V to 4.9V@1 kHz
Reference Input
Voltage Range
0.25
鈥�
VDD
V
Current Drain
鈥�
100
0.001
150
3.0
A
CS = VDD = 5V
Analog Inputs
Input Voltage Range for CH0-
CH7 in Single-Ended Mode
VSS
鈥擵REF
V
Input Voltage Range for IN+ in
pseudo-differential Mode
IN-
鈥�
VREF+IN-
Note 1:
This parameter is established by characterization and not 100% tested.
2:
See graphs that relate linearity performance to VREF levels.
3:
Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, particularly at elevated temperatures. See Section 6.2 鈥淢aintaining Minimum Clock
, 鈥淢aintaining Minimum Clock Speed鈥�, for more information.
鐩搁棞(gu膩n)PDF璩囨枡
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
MCP3204-BISL 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V 4-Channel/8-Channel 12-Bit A/D Converters with SPI Serial Interface
MCP3204-BIST 鍒堕€犲晢:MICROCHIP 鍒堕€犲晢鍏ㄧū:Microchip Technology 鍔熻兘鎻忚堪:2.7V 4-Channel/8-Channel 12-Bit A/D Converters with SPI Serial Interface
MCP3204-CI/P 鍔熻兘鎻忚堪:妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 - ADC 12-bit SPI 4 Chl RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 绲�(ji茅)妲�(g貌u):Sigma-Delta 杞�(zhu菐n)鎻涢€熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-32
MCP3204-CI/P 鍒堕€犲晢:Microchip Technology Inc 鍔熻兘鎻忚堪:IC 12BIT ADC 3204 DIP14
MCP3204-CI/SL 鍔熻兘鎻忚堪:妯℃暩(sh霉)杞�(zhu菐n)鎻涘櫒 - ADC 12-bit SPI 4 Chl RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 绲�(ji茅)妲�(g貌u):Sigma-Delta 杞�(zhu菐n)鎻涢€熺巼:125 SPs to 8 KSPs 鍒嗚鲸鐜�:24 bit 杓稿叆椤炲瀷:Differential 淇″櫔姣�:107 dB 鎺ュ彛椤炲瀷:SPI 宸ヤ綔闆绘簮闆诲:1.7 V to 3.6 V, 2.7 V to 5.25 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:VQFN-32
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