參數(shù)資料
型號(hào)： MCP2050T-500E/MQ
廠商： Microchip Technology
文件頁(yè)數(shù)： 40/42頁(yè)
文件大?。?/td> 0K
描述： IC TXRX LIN 5.0V LDO 20-QFN
產(chǎn)品培訓(xùn)模塊： Microchip MCP20xx LIN Transceiver Overview
標(biāo)準(zhǔn)包裝： 3,300
系列： *
2012 Microchip Technology Inc.
DS22299B-page 7
MCP2050
FIGURE 1-5:
NO TRIGGER
1.3
Pin Descriptions
Please refer to Table 1-2 for the pinout overview.
1.3.1
VBB
Battery Positive Supply Voltage pin. An external diode
is connected in series to prevent the device from being
reversely powered (refer Figure 1-14).
1.3.2
VREG
Positive Supply Voltage Regulator Output pin. An on-
chip LDO gives +5.0 or +3.3V 70 mA regulated voltage
on this pin.
1.3.3
VSS
Ground pin.
1.3.4
TXD
Transmit Data Input pin (TTL level, HV compliant,
adaptive pull-up). The transmitter reads the data
stream on TXD pin and sends it to LIN bus. The LBUS
pin is low (dominant) when TXD is low, and high
(recessive) when TXD is high.
The Transmit Data Input pin has an internal adaptive
pull-up to an internally-generated 4.2V (approximate).
When TXD is ‘0’, a weak pull-up (~900 k) is used to
reduce current. When TXD is ‘1’ a stronger pull-up
(~300 k) is used to maintain the logic level. A series
reverse-blocking diode allows applying TXD input volt-
ages greater than the internally generated 4.2V and
renders TXD pin HV compliant up to 30V (see the Block
Diagram on page 2).
1.3.5
RXD
Receive Data Output pin. The RXD pin is a standard
CMOS output pin and it follows the state of the LBUS
pin.
1.3.6
LBUS
LIN Bus pin.
LBUS is a bidirectional LIN bus Interface
pin and is controlled by the signal TXD. It has an open
collector output with a current limitation. To reduce
electromagnetic emission, the slopes during signal
changes are controlled, and the LBUS pin has
corner-rounding control for both falling and rising
edges.
The internal LIN receiver observes the activities on LIN
bus, and generates the output signal RXD that follows
the state of the LBUS. A first degree 160 kHz, low-pass
input filter optimizes electromagnetic immunity.
1.3.7
CS/LWAKE
Chip Select and Local Wake-up Input pin (TTL level,
high voltage tolerant). This pin controls the device state
transition. Refer to FIGURE 1-1: “State Diagram”.
If CS/LWAKE = 1, the device can work in OPERATION
mode (FAULT/TXE = 1) or TRANSMITTER OFF mode
(FAULT/TXE = 0).
tooearly
triggerwindow
Windowlength
50%
earliesttriggerpoint
lastesttriggerpoint
nextperiod
tooearly
triggerwindow
Windowlength
50%
Newperiodbegins
WWDTTRIG
WWDTRESET
1
0
1
TWD
notrigger,timerexpired
tWDRST
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