- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378669 > MCM72F7ADG10 (MOTOROLA INC) 512KB and 1MB Synchronous Fast Static RAM Module PDF資料下載
參數(shù)資料
| 型號(hào)： | MCM72F7ADG10 |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 512KB and 1MB Synchronous Fast Static RAM Module |
| 中文描述： | 128K X 72 MULTI DEVICE SRAM MODULE, 10 ns, DMA168 |
| 封裝： | DIMM-168 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 160K |
| 代理商： | MCM72F7ADG10 |
MCM72F6A
MCM72F7A
7
MOTOROLA FAST SRAM
MCM72F7A CAPACITANCE
(f = 1.0 MHz, dV = 3.0 V, TA = 0 to 70
°
C, Periodically Sampled Rather Than 100% Tested)
Parameter
Symbol
Typ
Max
Unit
Input Capacitance
W, K
E, G
Other Inputs
Cin
—
—
—
22
36
60
pF
I/O Capacitance
CI/O
—
28
pF
MASS
(Periodically Sampled Rather Than 100% Tested)
Parameter
Max
Unit
MCM72F6A
16
g
MCM72F7A
20
g
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V + 10%, – 5%, TA = 0 to 70
°
C, Unless Otherwise Noted)
Input Timing Measurement Reference Level
Input Pulse Levels
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Rise/Fall Time
. . . . . . . . . . . . . . . . . . . . . . .
1.5 V
. . . . . . . . . . . . . . .
0 to 3.0 V
1 V/ns (20 to 80%)
Output Timing Reference Level
Output Load
. . . . . . . . . . . . . .
1.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . .
See Figure 1 Unless Otherwise Noted
DATA RAMs READ/WRITE CYCLE TIMING
(See Notes 1, 2, 3, and 4)
Parameter
Symbol
b l
MCM72F6A–9
MCM72F7A–9
MCM72F6A–10
MCM72F7A–10
MCM72F6A–12
MCM72F7A–12
U i
Unit
Notes
Min
Max
Min
Max
Min
Max
Cycle Time
tKHKH
tKHKL
tKLKH
tKHQV
tGLQV
tKHQX1
tKHQX2
tGLQX
tGHQZ
tKHQZ
tAVKH
tADKH
tDVKH
tWVKH
tEVKH
12
—
15
—
16.6
—
ns
Clock High Pulse Width
4
—
5
—
6
—
ns
Clock Low Pulse Width
4
—
5
—
6
—
ns
Clock Access Time
—
9
—
10
—
12
ns
Output Enable to Output Valid
—
5
—
5
—
6
ns
Clock High to Output Active
0
—
0
—
0
—
ns
5
Clock High to Output Change
3
—
3
—
3
—
ns
5
Output Enable to Output Active
0
—
0
—
0
—
ns
5
Output Disable to Q–High–Z
—
5
—
5
—
6
ns
5, 6
Clock High to Q–High–Z
3
5
3
5
3
6
ns
5, 6
Setup Times
Address
ADSP
Data In
Write
Chip Enable
2.5
—
2.5
—
2.5
—
ns
Hold Times:
Address
ADSP, ADSC, ADV
Data In
Write
Chip Enable
tKHAX
tKHADX
tKHDX
tKHWX
tKHEX
0.5
—
0.5
—
0.5
—
ns
NOTES:
1. In setup and hold times, write refers to any Wx low.
2. Chip Enable is defined as Ex low, whenever ADSP is asserted.
3. All read and write cycle timings are referenced from K or G.
4. G is a don’t care after write cycle begins. To prevent bus contention, G should be negated prior to start of write cycle.
5. This parameter is sampled and not 100% tested.
6. Measured at
±
200 mV from steady state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM72F7ADG12 | 512KB and 1MB Synchronous Fast Static RAM Module |
| MCM72F7ADG9 | 512KB and 1MB Synchronous Fast Static RAM Module |
| MCR106 | Silicon Controlled Rectifiers |
| MCR106 | Sensitive Gate Silicon Controlled Rectifiers |
| MCR106-6 | Sensitive Gate Silicon Controlled Rectifiers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM72F7ADG12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB Synchronous Fast Static RAM Module |
| MCM72F7ADG9 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB Synchronous Fast Static RAM Module |
| MCM72F7DG10 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB Synchronous Fast Static RAM Module |
| MCM72F7DG12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB Synchronous Fast Static RAM Module |
| MCM72F7DG9 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:512KB and 1MB Synchronous Fast Static RAM Module |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。