- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369915 > MCM6949 (Motorola, Inc.) 1Mx4 Bit Static Random Access Memory(1Mx4位靜態(tài)RAM) PDF資料下載
參數(shù)資料
| 型號： | MCM6949 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 1Mx4 Bit Static Random Access Memory(1Mx4位靜態(tài)RAM) |
| 中文描述： | 1Mx4位靜態(tài)隨機(jī)存取存儲器（1Mx4位靜態(tài)RAM）的 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 121K |
| 代理商： | MCM6949 |
MCM6949
7
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled; See Notes 1, 2, and 3)
Parameter
Symbol
b l
MCM6949–8
Min
MCM6949–10
Min
MCM6949–12
Min
MCM6949–15
Min
U i
Unit
Notes
Max
Max
Max
Max
Write Cycle Time
tAVAV
tAVEL
tAVEH
tAVEH
tELEH,
tELWH
tELEH,
tELWH
tDVEH
tEHDX
tEHAX
8
—
10
—
12
—
15
—
ns
4
Address Setup Time
0
—
0
—
0
—
0
—
ns
Address Valid to End of Write
8
—
9
—
10
—
12
—
ns
Address Valid to End of Write (G High)
7
—
8
—
9
—
10
—
ns
Enable Pulse Width
8
—
9
—
10
—
12
—
ns
5, 6
Enable Pulse Width (G High)
7
—
8
—
9
—
10
—
ns
5, 6
Data Valid to End of Write
5
—
5
—
6
—
7
—
ns
Data Hold Time
0
—
0
—
0
—
0
—
ns
Write Recovery Time
0
—
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. If G goes low coincident with or after W goes low, the output will remain in a high–impedance state.
4. All write cycle timing is referenced from the last valid address to the first transitioning address.
5. If E goes low coincident with or after W goes low, the output will remain in a high–impedance condition.
6. If E goes high coincident with or before W goes high, the output will remain in a high–impedance condition.
DATA VALID
HIGH–Z
tAVAV
tAVEH
tAVEL
tELWH
tEHAX
tDVEH
tEHDX
A (ADDRESS)
E (CHIP ENABLE)
W (WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
tELEH
WRITE CYCLE 2
(E Controlled; See Notes 1, 2, and 3)
Motorola Memory Prefix
Part Number
Package (YJ = 400 mil SOJ)
Shipping Method (R = Tape and Reel, Blank = Rails)
Speed (8 = 8 ns, 10 = 10 ns, 12 = 12 ns,
15 = 15 ns)
MCM 6949
XX XX XX
ORDERING INFORMATION
(Order by Full Part Number)
Full Part Numbers — MCM6949YJ8
MCM6949YJ10
MCM6949YJ10R
MCM6949YJ12
MCM6949YJ12R
MCM6949YJ15
MCM6949YJ15R
MCM6949YJ8R
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM69R618 | 1M Synchronous Late Write Fast SRAM(1M位同步遲寫、快速靜態(tài)RAM) |
| MCM69R536 | 1M Synchronous Late Write Fast SRAM(1M位同步遲寫、快速靜態(tài)RAM) |
| MCT2E | 6-Pin DIP Optoisolators Transistor Output |
| MCT2E | Industry Standard Single Channel 6 Pin DIP Optocoupler |
| MCT2E | PHOTOTRANSISTOR OPTOCOUPLERS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM6949YJ10 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 4 Bit Static Random Access Memory |
| MCM6949YJ10R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 4 Bit Static Random Access Memory |
| MCM6949YJ12 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 4 Bit Static Random Access Memory |
| MCM6949YJ12R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 4 Bit Static Random Access Memory |
| MCM6949YJ15 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1M x 4 Bit Static Random Access Memory |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。