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參數(shù)資料
| 型號： | MCM67Q909 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 512Kx9 Bit Synchronous Fast Static RAM(512Kx9位同步快速靜態(tài)RAM) |
| 中文描述： | 512Kx9位同步快速靜態(tài)存儲器（512Kx9位同步快速靜態(tài)內(nèi)存） |
| 文件頁數(shù)： | 2/12頁 |
| 文件大?。?/td> | 91K |
| 代理商： | MCM67Q909 |
MCM67Q909
2
MOTOROLA FAST SRAM
A0 – A18
E
G
W
K
DECODERS
MEMORY
ARRAY
512K x 9 ARRAY
SENSE AMPS
AND WRITE
DRIVERS
WRITE PULSE
GENERATOR
Q0 – Q8
BLOCK DIAGRAM
OUTPUT
REGISTER
D0 – D8
MUX
2:1
REG
REG
REG
REG
REG
* Four added test pins.
NOTES:
1. Bypass mode is entered with SE low and SCK cycled.
2. SH BSR = shadow bypass scan register.
3. There are 41 bumps used in boundary scan. VSS, VCC, NC, SDI, SDO, SE, and SCK not used in scan path.
4. SDO output sequence: A6, A4, A2, A0, D8, Q8, D6, Q6, D4, Q4, D2, Q2, D0, Q0, A18, A1, A3, A5, A7, A8, A9, A10, A11, A12,
A13, Q1, D1, Q3, D3, Q5, D5, Q7, D7, A15, A16, A14, A17, E, G, W, K.
SH
BSR
∧
L
0
1
LS
LM
O
*
BYPASS
*
SDO
SE
I
SCK
SCK
SDI
*
I
SE
*
I
SCK
SCK
SH
BSR
SH
BSR
SH
BSR
SH
BSR
SH
BSR
SH
BSR
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