參數(shù)資料
型號(hào): MCM20014IBB
廠商: MOTOROLA INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: 1/3” Color VGA Digital Image Sensor
中文描述: SPECIALTY ANALOG CIRCUIT, CQCC48
封裝: CERAMIC, LCC-48
文件頁數(shù): 27/54頁
文件大?。?/td> 761K
代理商: MCM20014IBB
MCM20014
MOTOROLA
27
The
Column DOVA RAM; Table 19
, is a 704 by 4-bit
vector that contains the per-column offset adjustment
used to eliminate column based offset FPN. This RAM
is automatically loaded with internally generated data
upon initialization and can be automatically reloaded as
defined earlier in this section.
The user can generate the DOVA RAM contents and
then load them into the RAM by performing a repetitive
write cycle to the same I
2
C address. An internal counter
will step the internal RAM address automatically from
column 0 to column 703 where column 0 is defined as
the left-most column of the pixel array. The user should
set and reset the
cntr
bit of the
Column DOVA Control
Register
, prior to loading the Column DOVA RAM to as-
sure proper addressing.
When the user is calculating values to be loaded into
the DOVA RAM, the fixed gain of 2x in the ASP after
the Column DOVA circuit must be taken into account.
Therefore, each code value in the DOVA RAM repre-
sents 2 code values in the 10-bit ADC output.
Address
21
h
Column DOVA Control
Default
00
h
msb (7)
6
5
4
3
2
1
lsb (0)
fuo
fuo
fuo
ece
fuo
fuo
cntr
cal
Bit
Number
Function
Description
Reset
State
7 - 5
FUO
Factory Use Only
000
b
4
Column
DOVA
Enable
1
b
= Column DOVA enabled (Register 22
h
)
0
b
= Global DOVA enabled (Register 20
h
)
0
b
3 - 2
FUO
Factory Use Only
00
b
1
Counter
Reset
0
b
= Counter Reset inactive
1
b
= Counter Reset active
0
b
0
Calibration
0
b
= Self Calibration disabled
1
b
= Self Calibration enabled
0
b
Table 18. Column DOVA Control Register
Address
22
h
Column DOVA RAM
Default
00
h
msb (7)
6
5
4
3
2
1
lsb (0)
x
x
x
x
cor[3]
cor[2]
cor[1]
cor[0]
Bit
Number
Function
Description
Reset
State
7 - 4
Unused
Unused
xxx
3
Sign
0
b
= Positive Offset
1
b
= Negative Offset
auto
Table 19. Column DOVA RAM
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