參數(shù)資料
型號: MCM20014
廠商: Motorola, Inc.
英文描述: 1/3” Color VGA Digital Image Sensor
中文描述: 1 / 3“彩色VGA數(shù)碼圖像傳感器
文件頁數(shù): 37/54頁
文件大?。?/td> 761K
代理商: MCM20014
MCM20014
MOTOROLA
37
5.5.3 Integration Time Control
The Integration Time registers;
Table 37
,
Table 38
, and
Table 39
, control the integration time for the pixel array.
Integration time for SFCM;
sint
[20:0], is measured in
MCLK cycles while the integration time for CFCM;
cint
[15:0], is measured in Virtual Row times. Please re-
fer to
Figure 8
for a pictorial description of the Virtual
Frame and its relationship to the WOI.
A virtual frame is the mechanism by which the user con-
trols the integration time and frame time for the output
data stream. By adding additional rows or columns as
blanking
to the WOI to form the Virtual Frame, the user
can control the amount of blanking in both horizontal
and vertical space.
Both the Virtual Frame Row Depth;
vrd
[13:0], and the
Virtual Frame Column Width;
vcw
[9:0] have a range of
0
d
to 16384
d
.
The user should be careful to create a Virtual Frame
that is larger than the WOI. There is no logic in the sen-
sor interface to prevent the user from defining a Virtual
Frame smaller than the WOI. Therefore, pixel data may
be lost.
The Virtual Frame must be 1 row and 6 columns larger
than the WOI.
The Virtual Frame completely defines the integration
time in CFCM. Any changes to the WOI or how the WOI
is sampled has no effect on integration time.
Address
4B
h
WOI Column Width MSB
Default
02
h
msb (7)
6
5
4
3
2
1
lsb (0)
x
x
x
x
x
x
wcw[9]
wcw[8]
Bit
Number
Function
Description
Reset
State
7 - 2
Unused
Unused
xxxxxx
1 - 0
WOI Col.
Width
In conjunction with the WOI Column Width LSB Register (
Table 36
),
forms the 10-bit WOI Column Width wcw[9:0].
10
b
Table 35. WOI Column Width MSB Register
Address
4C
h
WOI Column Width LSB
Default
7F
h
msb (7)
6
5
4
3
2
1
lsb (0)
wcw[7]
wcw[6]
wcw[5]
wcw[4]
wcw[3]
wcw[2]
wcw[1]
wcw[0]
Bit
Number
Function
Description
Reset
State
7 - 0
WOI Row
Pointer
In conjunction with the WOI Column Width MSB Register (
Table 35
),
forms the 10-bit WOI Column Width wcw[9:0].
Desired = wcw
d
+ 1.
01111111
b
(
640 col.)
Table 36. WOI Column Width LSB Register
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