
MOTOROLA
MCM20014
10
Figure 12. Color Gain Register Selection
2.2.3.2 Global Gain PGA
The global gain DPGA provides a 1.0x to 8.0x program-
mable gain adjustment for dynamic range. The gain of
the amplifier is linearly programmable using a six bit
gain coefficient in steps of 0.12x. The user programs the
global gain via the
DPGA Global Gain Register, (Table
16), on page 25
.
2.2.4 Global Digital Offset Voltage Adjust (DOVA)
A programmable global offset adjustment is available
on the MCM20014. A user defined offset value is loaded
via a 6-bit signed magnitude programming code via the
Global DOVA Register, (Table 20), on page 28
.
Offset correction allows fine-tuning of the signal to re-
move any additional residual error which may have ac-
cumulated in the analog signal path. This function is
performed directly before analog to digital conversion
and introduces a fixed gain of 2.0X. This feature is use-
ful in applications that need to insert a desired offset to
adjust for a known system noise floor relative to AVSS
and offsets of amplifiers in the analog chain.
2.2.5 Analog to Digital Converter (ADC)
The ADC is a fully differential, low power circuit. A pipe-
lined, Redundant Signed Digit (RSD) algorithmic tech-
nique is used to yield an ADC with superior
characteristics for imaging applications.
Integral Noise Linearity (INL) and Differential Noise Lin-
earity (DNL) performance is specified at +1.0 and +0.5,
respectively, with no missing codes. The input voltage
resolution is 2.44 mV with a full-scale 2.5 V
pp
input (2.5
V
pp
/2
10
). The input dynamic range of the ADC is pro-
grammed via a Programmable Voltage Reference Gen-
erator. The positive reference voltage (VREFP) and
negative reference voltages (VREFM) can be pro-
grammed from 2.5V to 1.25V and 0V to 1.25V respec-
tively in steps of 5mV via the Reference Voltage
Registers (
Table 12
and
Table 13
). This feature is used
independently or in conjunction with the DPGAs to max-
imize the system dynamic range based on incident illu-
mination. The default input range for the ADC is 1.9V for
VREFP and 0.6V for VREFM hence allowing a 10 bit
digitization of a 1.3V peak to peak signal.
2.3 Digital Signal Post Processing
The post ADC functions provide means for manipulating
the 10-bit imager data. These functions are replacing
bad pixels and output signal companding.
2.3.1 Bad Pixel Replacement
This block conditionally monitors and replaces any de-
fective pixels on the imager. The user sets threshold
values for extreme black and extreme white to detect
bad pixels and independently enables/disables one or
both detections. Threshold values are input via the
White and Black Pixel Threshold Registers (
Table 21
and
Table 22
respectively) while the functions them-
selves are enabled via the
Post ADC Control Register,
(Table 23), on page 29
.
The black threshold input sets the 8 LSBs of the mini-
mum detection level. The 2 MSBs are hard coded to 00
hence giving a range of 0-255 for setting the black
threshold levels. Any pixel value below the predefined
black threshold level is replaced. Similarly the white
threshold input sets the 8 LSBs of the maximum detec-
tion level. The 2 MSBs are hard coded to 11 allowing a
range white threshold level settings between 768 and
1023 code levels. Any pixels value above the defined-
white threshold level is replaced. The replacement val-
ue in either case is determined automatically by the
control bus. Based on the location of the pixel, a deci-
sion to replace the pixel value by the same color aver-
age, leading or trailing pixel value is made.
2.3.2 Data Compander
The Data Compander allows coring of the lower order
bits. In effect, it expands the values of lower signal lev-
els and compresses high light scenes thereby allowing
for on-chip contrast adjustments. The companding
function performs an 8-bit transformation on the in-com-
ing 10-bit data stream. The output is made available on
the upper 8 MSBs of the 10 bit output bus. The user can
select one of the 8 transformation curves shown in
Fig-
ure 13
via the
Post ADC Control Register, (Table 23),
on page 29
. The bottom curve is linear in which the input
is divided by four. For other choices, the I/O relationship
is kept 1:1 up to a certain breakpoint. There onwards a
straight line equation is used to transform the remaining
input values.
6
6
DPGA
0.9x-4.6x
6
6
6
Green (0)
Red (1)
Blue (2)
Green (3)
R(1)
G(0)
G(3)
B(2)