參數(shù)資料
型號: MCK12140D
廠商: MOTOROLA INC
元件分類: XO, clock
英文描述: PHASE-FREQUENCY DETECTOR
中文描述: PHASE DETECTOR, 650 MHz, PDSO8
封裝: PLASTIC, SO-8
文件頁數(shù): 1/4頁
文件大?。?/td> 71K
代理商: MCK12140D
Device
Operating
Temperature Range
Package
SEMICONDUCTOR
TECHNICAL DATA
PHASE–FREQUENCY
DETECTOR
ORDERING INFORMATION
MCH1214OD
MCK12140D
TA = –40
°
to +70
°
C
SO–8
(Top View)
PIN CONNECTIONS
Order this document By MCH12140/D
1
8
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
8
1
VCC
U
7
2
R
U
6
3
V
D
5
4
VEE
D
The MCH/K12140 is a phase frequency-detector intended for
phase-locked loop applications which require a minimum amount of phase
and frequency difference at lock. When used in conjunction with the
MC12147, MC12148 or MC12149 VCO, a high bandwidth PLL can be
realized. The device is functionally compatible with the MC12040
phase-frequency detector, however the MOSAIC
III process is used to
push the maximum frequency to 800 MHz and significantly reduce the dead
zone of the detector. When the Reference (R) and VCO (V) inputs are
unequal in frequency and/or phase, the differential UP (U) and DOWN (D)
outputs will provide pulse streams which when subtracted and integrated
provide an error voltage for control of a VCO.
The device is packaged in a small outline, surface mount 8-lead SOIC
package. There are two versions of the device to provide I/O compatibility to
the two existing ECL standards. The MCH12140 is compatible with
MECL10H
logic levels while the MCK12140 is compatible to 100K ECL
logic levels. This device can also be used in +5.0 V systems. Please refer to
Motorola Application Note AN1406/D, “Designing with PECL (ECL at +5.0
V)” for more information.
800 MHz Typical Bandwidth
Small Outline 8-Lead SOIC Package
75 k
Internal Input Pulldown Resistors
>1000 V ESD Protection
For proper operation, the input edge rate of the R and V inputs should be
less than 5ns.
MOSAIC III and MECL 10H are trademarks of Motorola
Motorola, Inc. 1997
Rev 4
S
Q
R
LOGIC DIAGRAM
R
R
Q
V
U (fR > fV)
U (fR > fV)
D (fV > fR)
D (fV > fR)
S
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