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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MCIMX353CVM5B |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 128/147闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MPU I.MX35 400MAPBGA |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 90 |
| 绯诲垪锛� | i.MX35 |
| 鏍稿績铏曠悊鍣細 | ARM11 |
| 鑺珨灏哄锛� | 32-浣� |
| 閫熷害锛� | 532MHz |
| 閫ｉ€氭€э細 | 1 绶�锛孋AN锛孍BI/EMI锛屼互澶恫(w菐ng)锛孖²C锛孧MC锛孲PI锛孲SI锛孶ART/USART锛孶SB OTG |
| 澶栧湇瑷�(sh猫)鍌欙細 | DMA锛孖²S锛孡CD锛孭OR锛孭WM锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 96 |
| 绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 | ROMless |
| RAM 瀹归噺锛� | 128K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.33 V ~ 1.47 V |
| 鎸暕鍣ㄥ瀷锛� | 澶栭儴 |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 400-LFBGA |
| 鍖呰锛� | 鎵樼洡 |
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i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 10
Freescale Semiconductor
81
DI_DISPn_TIME_CONF_3 registers (n = 0,1,2). Figure 57 shows the timing of the parallel interface with
read wait states.
Figure 57. Parallel Interface Timing Diagram鈥擱ead Wait States
4.9.13.4.9
Parallel Interfaces, Electrical Characteristics
Figure 58, Figure 60, Figure 59, and Figure 61 depict timing of asynchronous parallel interfaces based on
the system 80 and system 68k interfaces. Table 58 lists the timing parameters at display access level. All
WRITE OPERATION
READ OPERATION
DISPB_D#_CS
DISPB_RD
DISPB_WR
DISPB_PAR_RS
DISPB_D#_CS
DISPB_RD
DISPB_WR
DISPB_PAR_RS
DISPB_DATA
DISPB_D#_CS
DISPB_RD
DISPB_WR
DISPB_PAR_RS
DISPB_DATA
DISP0_RD_WAIT_ST=00
DISP0_RD_WAIT_ST=01
DISP0_RD_WAIT_ST=10
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| VI-26X-IY-F1 | CONVERTER MOD DC/DC 5.2V 50W |
| SSM2604CPZ-REEL7 | IC AUDIO CODEC LP 20-LFCSP |
| MCIMX357DVM5B | PROCESSOR MULTIMEDIA 400PBGA |
| VI-26W-IY-F3 | CONVERTER MOD DC/DC 5.5V 50W |
| VI-26V-IY-F4 | CONVERTER MOD DC/DC 5.8V 50W |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
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|---|---|
| MCIMX353DJQ5C | 鍔熻兘鎻忚堪:铏曠悊鍣� - 灏堥杸鎳�(y墨ng)鐢� RINGO MX35 TO2.1 RoHS:鍚� 鍒堕€犲晢:Freescale Semiconductor 椤炲瀷:Multimedia Applications 鏍稿績:ARM Cortex A9 铏曠悊鍣ㄧ郴鍒�:i.MX6 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:1 GHz 鎸囦护/鏁�(sh霉)鎿�(j霉)绶╁瓨: 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鏁�(sh霉)鎿�(j霉) ROM 澶у皬: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 95 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:MAPBGA-432 |
| MCIMX353DJQ5CR2 | 鍔熻兘鎻忚堪:铏曠悊鍣� - 灏堥杸鎳�(y墨ng)鐢� RINGO MX35 TO2.1 RoHS:鍚� 鍒堕€犲晢:Freescale Semiconductor 椤炲瀷:Multimedia Applications 鏍稿績:ARM Cortex A9 铏曠悊鍣ㄧ郴鍒�:i.MX6 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:1 GHz 鎸囦护/鏁�(sh霉)鎿�(j霉)绶╁瓨: 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鏁�(sh霉)鎿�(j霉) ROM 澶у皬: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 95 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:MAPBGA-432 |
| MCIMX353DVM5B | 鍔熻兘鎻忚堪:铏曠悊鍣� - 灏堥杸鎳�(y墨ng)鐢� i.MX35 Auto Apps Processor RoHS:鍚� 鍒堕€犲晢:Freescale Semiconductor 椤炲瀷:Multimedia Applications 鏍稿績:ARM Cortex A9 铏曠悊鍣ㄧ郴鍒�:i.MX6 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:1 GHz 鎸囦护/鏁�(sh霉)鎿�(j霉)绶╁瓨: 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鏁�(sh霉)鎿�(j霉) ROM 澶у皬: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 95 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:MAPBGA-432 |
| MCIMX355AJQ4C | 鍒堕€犲晢:FREESCALE 鍒堕€犲晢鍏ㄧū:Freescale Semiconductor, Inc 鍔熻兘鎻忚堪:i.MX35 Applications Processors for Automotive Products |
| MCIMX355AJQ5C | 鍔熻兘鎻忚堪:铏曠悊鍣� - 灏堥杸鎳�(y墨ng)鐢� RINGO MX35 TO2.1 RoHS:鍚� 鍒堕€犲晢:Freescale Semiconductor 椤炲瀷:Multimedia Applications 鏍稿績:ARM Cortex A9 铏曠悊鍣ㄧ郴鍒�:i.MX6 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:1 GHz 鎸囦护/鏁�(sh霉)鎿�(j霉)绶╁瓨: 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:128 KB 鏁�(sh霉)鎿�(j霉) ROM 澶у皬: 宸ヤ綔闆绘簮闆诲: 鏈€澶у伐浣滄韩搴�:+ 95 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:MAPBGA-432 |
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