參數(shù)資料
型號： MCIMX27VOP4A
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA404
封裝： 17 X 17 MM, 0.65 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-404
文件頁數(shù)： 80/152頁
文件大?。?/td> 3889K
代理商： MCIMX27VOP4A
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
Freescale Semiconductor
33
Signal Descriptions
USBOTG_DATA4/RXDM
USB OTG data4/Receive Data Minus signal; multiplexed with SLCDC1_DAT14 through PC12
USBOTG_DATA1/TXDP
USB OTG data1/Transmit Data Plus signal; multiplexed with SLCDC1_DAT13 through PC11
USBOTG_DATA2/TXDm
USB OTG data2/Transmit Data Minus signal; multiplexed with SLCDC1_DAT12 through PC10
USBOTG_DATA0/Oen
USB OTG data0/Output Enable signal; multiplexed with SLCDC1_DAT11 through PC9
USBOTG_DATA6/SPEED
USB OTG data6/Suspend signal; multiplexed with SLCDC1_DAT10 and USBG_TXR_INT_B
through PC8
USBOTG_DATA5/RCV
USB OTG data5/RCV signal; multiplexed with SLCDC1_DAT9 through PC7
USBH1_RXDP
USB Host1 Receive Data Plus signal, multiplexed with UART4_RXD; multiplexed with
SLCDC1_DAT6 and UART4_RTS_ALT through PB31
USBH1_RXDM
USB Host1 Receive Data Minus signal; multiplexed with SLCDC1_DAT5 and UART4_CTS
through PB30
USBH1_TXDP
USB Host1 Transmit Data Plus signal; multiplexed with UART4_CTS, multiplexed with
SLCDC1_DAT4 and UART4_RXD_ALT through PB29
USBH1_TXDM
USB Host1 Transmit Data Minus signal; multiplexed with UART4_TXD, multiplexed with
SLCDC1_DAT3 through PB28
USBH1_OE_B
USB Host1 Output Enable signal; multiplexed with SLCDC1_DAT2 through PB27
USBH1_FS
USB Host1 Full Speed output signal, multiplexed with UART4_RTS, multiplexed with
SLCDC1_DAT1 through PB26
USBH1_RCV
USB Host1 RCV signal; multiplexed with SLCDC1_DAT0 through PB25
USB_OC_B
USB OC signal. PB24
USB_PWR
USB Power signal; PB23
USBH1_SUSP
USB Host1 Suspend signal; PB22
LCD Controller and Smart LCD Controller
OE_ACD
Alternate Crystal Direction/Output Enable; PA31
CONTRAST
This signal is used to control the LCD bias voltage as contrast control; PA30
VSYNC
Frame Sync or Vsync—This signal also serves as the clock signal output for gate;
driver (dedicated signal SPS for Sharp panel HR-TFT); PA29.
HSYNC
Line Pulse or HSync; PA28
SPL_SPR
Sampling start signal for left and right scanning. Through GPIO, this signal is multiplexed with
the SLCDC1_CLK; PA27.
PS
Control signal output for source driver (Sharp panel dedicated signal). This signal is multiplexed
with the SLCDC1_CS; PA26.
CLS
Start signal output for gate driver. This signal is invert version of PS (Sharp panel dedicated
signal). This signal is multiplexed with the SLCDC1_RS; PA25.
REV
Signal for common electrode driving signal preparation (Sharp panel dedicated signal). This
signal is multiplexed with SLCDC1_D0; PA24.
Table 3. i.MX27/MX27L Signal Descriptions (continued)
Pad Name
Function/Notes
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相關代理商/技術參數(shù)
參數(shù)描述
MCIMX27VOP4AR2 功能描述:處理器 - 專門應用 I.MX27 REV 2.1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX27VOP4R2 制造商:Freescale Semiconductor 功能描述:MULTIMEDIA PROCESSOR 404-PIN MA-BGA T/R - Tape and Reel
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MCIMX280CVM4B 功能描述:處理器 - 專門應用 Catskills Rev1.2 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX280DVM4B 功能描述:處理器 - 專門應用 Catskills Rev1.2 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
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