參數(shù)資料
型號(hào): MCIMX27VOP4A
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA404
封裝: 17 X 17 MM, 0.65 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-404
文件頁數(shù): 143/152頁
文件大?。?/td> 3889K
代理商: MCIMX27VOP4A
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
90
Freescale Semiconductor
Electrical Characteristics
NOTE
All the timings for the SSI are given for a non-inverted serial clock polarity
(TSCKP/RSCKP = 0) and a non-inverted frame sync (TFSI/RFSI = 0). If the
polarity of the clock and/or the frame sync have been inverted, all the timing
remains valid by inverting the clock signal STCK/SRCK and/or the frame
sync STFS/SRFS shown in the tables and in the figures.
All timings are on AUDMUX pads when the SSI is being used for data
transfer.
“Tx” and “Rx” refer to the Transmit and Receive sections of the SSI.
For internal Frame Sync operation using external clock, the FS timing will
be same as that of Tx Data, for example, during the AC97 mode of
operation.
4.3.11.4
SSI Receiver Timing with External Clock
Figure 51 and Figure 52 show the SSI receiver timing with external clock, and Table 49 lists the timing
parameters.
Figure 51. SSI Receiver with External Clock Timing Diagram
SS24
SS34
SS35
SS30
SS28
SS26
SS25
SS23
AD1_TXC
AD1_TXFS (bl)
AD1_TXFS (wl)
AD1_RXD
SS40
SS22
SS32
SS36
SS41
(Input)
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