i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
48
Freescale Semiconductor
3.7.2.3.1
UDMA In-Transfer Timing
Figure 15 shows the timing for UDMA in-transfer start.
Figure 15. Timing for UDMA In-Transfer Start
Figure 16 shows the timing for host-terminated UDMA in-transfer.
Figure 16. Timing for Host-Terminated UDMA In-Transfer
DMARQ
ADDR
DIOR
DIOW
IORDY
DATA READ
DMACK
tack
tenv
tds
tdh
tc1
DMARQ
ADDR
DIOR
DIOW
IORDY
DATA READ
DMACK
tds
tdh
tc1
DATA WRITE
buffer_en
tack
trp
tx1
tzah
ton tdzfs tcvh
toff
tmli
