參數(shù)資料
型號(hào): MCHRC705KJ1CDWE
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 46/108頁(yè)
文件大小: 0K
描述: IC MCU 8BIT 64 BYTES RAM 16-S0IC
標(biāo)準(zhǔn)包裝: 47
系列: HC05
核心處理器: HC05
芯體尺寸: 8-位
速度: 4MHz
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 10
程序存儲(chǔ)器容量: 1.2KB(1.2K x 8)
程序存儲(chǔ)器類型: OTP
RAM 容量: 64 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
包裝: 管件
Central Processor Unit (CPU)
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
42
Freescale Semiconductor
4.6.2.4 Bit Manipulation Instructions
The CPU can set or clear any writable bit in the first 256 bytes of memory, which includes I/O registers
and on-chip RAM locations. The CPU can also test and branch based on the state of any bit in any of the
first 256 memory locations.
NOTE
Do not use bit manipulation instructions on registers with write-only bits.
4.6.2.5 Control Instructions
These instructions act on CPU registers and control CPU operation during program execution.
Table 4-4. Bit Manipulation Instructions
Instruction
Mnemonic
Bit Clear
BCLR
Branch if Bit Clear
BRCLR
Branch if Bit Set
BRSET
Bit Set
BSET
Table 4-5. Control Instructions
Instruction
Mnemonic
Clear Carry Bit
CLC
Clear Interrupt Mask
CLI
No Operation
NOP
Reset Stack Pointer
RSP
Return from Interrupt
RTI
Return from Subroutine
RTS
Set Carry Bit
SEC
Set Interrupt Mask
SEI
Stop Oscillator and Enable IRQ Pin
STOP
Software Interrupt
SWI
Transfer Accumulator to Index Register
TAX
Transfer Index Register to Accumulator
TXA
Stop CPU Clock and Enable Interrupts
WAIT
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