參數(shù)資料
型號(hào): MCF54416CMJ250
廠商: Freescale Semiconductor
文件頁數(shù): 49/61頁
文件大小: 0K
描述: IC MCU 32BIT 256MAPBGA
標(biāo)準(zhǔn)包裝: 450
系列: MCF5441x
核心處理器: Coldfire V4
芯體尺寸: 32-位
速度: 250MHz
連通性: 1 線,CAN,EBI/EMI,以太網(wǎng),I²C,智能卡,SPI,SSI,UART/USART,USB,USB OTG
外圍設(shè)備: DMA,PWM,WDT
輸入/輸出數(shù): 87
程序存儲(chǔ)器類型: ROMless
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.14 V ~ 1.32 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 256-LBGA
包裝: 托盤
Electrical characteristics
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor
53
4.25
SBF timing specifications
The Serial boot facility (SBF) provides a means to read configuration information and system boot code from a broad array of
SPI-compatible EEPROMs, flashes, FRAMs, nVSRAMs, etc. Table 37 provides the AC timing specifications for the SBF.
All SBF signals use pad type pad_msr. The following timing specifications assume a pad slew rate setting of 11 and a load of
50 pF.1
Figure 34. SBF timing
1.These timing parameters are specified assuming maximum operating frequency and the fastest pad slew rate setting
(11). When operating this interface at lower frequencies, increase the slew rate by using the 10, 01, or 00 setting to
increase edge rise and fall times, thus reducing EMI.
Table 37. SBF AC timing specifications
Name
Characteristic
Symbol
Min
Max
Unit
Notes
SBF_CK frequency
fSBFCK
62.5
MHz
SB1
SBF_CK cycle time
tSBFCK
16.67
ns
1
1 At reset, the SBF_CK cycle time is t
REF 60. The first byte of data read from the serial memory contains a divider value
that is used to set the SBF_CK cycle time for the duration of the serial boot process.
SB2
SBF_CK high/low time
30%
tSBFCK
SB3
SBF_CS to SBF_CK delay
tSBFCK – 2.0
ns
SB4
SBF_CK to SBF_CS delay
tSBFCK – 2.0
ns
SB5
SBF_CK to SBF_DO valid
5
ns
SB6
SBF_CK to SBF_DO invalid
–5
ns
SB7
SBF_DI to SBF_SCK input setup
10
ns
SB8
SBF_CK to SBF_DI input hold
0
ns
SBF_CS
SBF_DO
SBF_DI
Data
Last Data
First Data
Data
Last Data
SB3
SB4
SB6
SB5
SBF_CK
SB1
SB2
SB7
SB8
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