The UBG1n registers hold the MSB, and" />
鍙冩暩璩囨枡
鍨嬭櫉锛� MCF5280CVM66
寤犲晢锛� Freescale Semiconductor
鏂囦欢闋佹暩锛� 374/766闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MPU 32BIT COLDF 256-MAPBGA
妯欐簴鍖呰锛� 90
绯诲垪锛� MCF528x
鏍稿績铏曠悊鍣細 Coldfire V2
鑺珨灏哄锛� 32-浣�
閫熷害锛� 66MHz
閫i€氭€э細 CAN锛孍BI/EMI锛屼互澶恫锛孖²C锛孲PI锛孶ART/USART
澶栧湇瑷倷锛� DMA锛孡VD锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁革細 142
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 ROMless
RAM 瀹归噺锛� 64K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 3.6 V
鏁告摎杞夋彌鍣細 A/D 8x10b
鎸暕鍣ㄥ瀷锛� 澶栭儴
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 256-LBGA
鍖呰锛� 鎵樼洡
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UART Modules
Freescale Semiconductor
23-15
23.3.11 UART Baud Rate Generator Registers (UBG1n/UBG2n)
The UBG1n registers hold the MSB, and the UBG2n registers hold the LSB of the preload value. UBG1n
and UBG2n concatenate to provide a divider to the internal bus clock for transmitter/receiver operation,
NOTE
The minimum value loaded on the concatenation of UBG1n with UBG2n is
0x0002. The UBG2n reset value of 0x00 is invalid and must be written to
before the UART transmitter or receiver are enabled. UBG1n and UBG2n
are write-only and cannot be read by the CPU.
23.3.12 UART Input Port Register (UIPn)
The UIPn registers show the current state of the UCTSn input.
IPSBAR
Offset:
0x00_0218 (UBG10)
0x00_0258 (UBG11)
0x00_0298 (UBG12)
Access: User write-only
76543210
R
W
Divider MSB
Reset:
000
00000
Figure 23-13. UART Baud Rate Generator Registers (UBG1n)
IPSBAR
Offset:
0x00_021C (UBG20)
0x00_025C (UBG21)
0x00_029C (UBG22)
Access: User write-only
76543210
R
W
Divider LSB
Reset:
000
00000
Figure 23-14. UART Baud Rate Generator Registers (UBG2n)
IPSBAR
Offset:
0x00_0234 (UIP0)
0x00_0274 (UIP1)
0x00_02B4 (UIP2)
Access: User read-only
76543210
R
1
CTS
W
Reset:
111
11111
Figure 23-15. UART Input Port Registers (UIPn)
MCF5282 and MCF5216 ColdFire Microcontroller User鈥檚 Manual, Rev. 3
鐩搁棞PDF璩囨枡
PDF鎻忚堪
VE-234-CU CONVERTER MOD DC/DC 48V 200W
VE-J6B-IX-S CONVERTER MOD DC/DC 95V 75W
MCF5280CVF66 IC MPU 32BIT 66MHZ 256-BGA
VE-J63-IX-S CONVERTER MOD DC/DC 24V 75W
VE-233-CU CONVERTER MOD DC/DC 24V 200W
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鍙冩暩鎻忚堪
MCF5280CVM66J 鍔熻兘鎻忚堪:32浣嶅井鎺у埗鍣� - MCU V2CORE NO FLASH RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:C28x 铏曠悊鍣ㄧ郴鍒�:TMS320F28x 鏁告摎绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:90 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:64 KB 鏁告摎 RAM 澶у皬:26 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2.97 V to 3.63 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:LQFP-80 瀹夎棰ㄦ牸:SMD/SMT
MCF5280CVM80 鍔熻兘鎻忚堪:32浣嶅井鎺у埗鍣� - MCU MCF5216 V2CORE NOFLASH RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:C28x 铏曠悊鍣ㄧ郴鍒�:TMS320F28x 鏁告摎绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:90 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:64 KB 鏁告摎 RAM 澶у皬:26 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2.97 V to 3.63 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:LQFP-80 瀹夎棰ㄦ牸:SMD/SMT
MCF5280CVM80J 鍔熻兘鎻忚堪:32浣嶅井鎺у埗鍣� - MCU V2CORE NO FLASH RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏍稿績:C28x 铏曠悊鍣ㄧ郴鍒�:TMS320F28x 鏁告摎绺界窔瀵害:32 bit 鏈€澶ф檪閻橀牷鐜�:90 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:64 KB 鏁告摎 RAM 澶у皬:26 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:2.97 V to 3.63 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:LQFP-80 瀹夎棰ㄦ牸:SMD/SMT
MCF5281CVF66 鍔熻兘鎻忚堪:IC MPU 32BIT 66MHZ 256-BGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:MCF528x 妯欐簴鍖呰:250 绯诲垪:56F8xxx 鏍稿績铏曠悊鍣�:56800E 鑺珨灏哄:16-浣� 閫熷害:60MHz 閫i€氭€�:CAN锛孲CI锛孲PI 澶栧湇瑷倷:POR锛孭WM锛屾韩搴﹀偝鎰熷櫒锛學DT 杓稿叆/杓稿嚭鏁�:21 绋嬪簭瀛樺劜鍣ㄥ閲�:40KB锛�20K x 16锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:闁冨瓨 EEPROM 澶у皬:- RAM 瀹归噺:6K x 16 闆诲 - 闆绘簮 (Vcc/Vdd):2.25 V ~ 3.6 V 鏁告摎杞夋彌鍣�:A/D 6x12b 鎸暕鍣ㄥ瀷:鍏ч儴 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:48-LQFP 鍖呰:鎵樼洡 閰嶇敤:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
MCF5281CVF80 鍔熻兘鎻忚堪:IC MPU 32BIT COLDF 256-MAPBGA RoHS:鍚� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:MCF528x 妯欐簴鍖呰:250 绯诲垪:56F8xxx 鏍稿績铏曠悊鍣�:56800E 鑺珨灏哄:16-浣� 閫熷害:60MHz 閫i€氭€�:CAN锛孲CI锛孲PI 澶栧湇瑷倷:POR锛孭WM锛屾韩搴﹀偝鎰熷櫒锛學DT 杓稿叆/杓稿嚭鏁�:21 绋嬪簭瀛樺劜鍣ㄥ閲�:40KB锛�20K x 16锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:闁冨瓨 EEPROM 澶у皬:- RAM 瀹归噺:6K x 16 闆诲 - 闆绘簮 (Vcc/Vdd):2.25 V ~ 3.6 V 鏁告摎杞夋彌鍣�:A/D 6x12b 鎸暕鍣ㄥ瀷:鍏ч儴 宸ヤ綔婧害:-40°C ~ 125°C 灏佽/澶栨:48-LQFP 鍖呰:鎵樼洡 閰嶇敤:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323