
UART Modules
23-12
Freescale Semiconductor
23.3.7
UART Transmit Buffers (UTBn)
The transmit buffers consist of the transmitter holding register and the transmitter shift register. The
holding register accepts characters from the bus master if UART’s USRn[TXRDY] is set. A write to the
transmit buffer clears USRn[TXRDY], inhibiting any more characters until the shift register can accept
more data. When the shift register is empty, it checks if the holding register has a valid character to be sent
(TXRDY = 0). If there is a valid character, the shift register loads it and sets USRn[TXRDY] again. Writes
to the transmit buffer when the UART’s TXRDY is cleared and the transmitter is disabled have no effect
on the transmit buffer.
Figure 23-9 shows UTBn. TB contains the character in the transmit buffer.
23.3.8
UART Input Port Change Registers (UIPCRn)
The UIPCRs hold the current state and the change-of-state for UCTSn.
IPSBAR
Offset:
0x00_020C (URB0)
0x00_024C (URB1)
0x00_028C (URB2)
Access: User read-only
76543210
R
RB
W
Reset:
111
11111
Figure 23-8. UART Receive Buffer (URBn)
IPSBAR
Offset:
0x00_020C (UTB0)
0x00_024C (UTB1)
0x00_028C (UTB2)
Access: User write-only
76543210
R
W
TB
Reset:
000
00000
Figure 23-9. UART Transmit Buffer (UTBn)
IPSBAR
Offset:
0x00_0210 (UIPCR0)
0x00_0250 (UIPCR1)
0x00_0290 (UIPCR2)
Access: User read-only
76543210
R
0
COS
1
CTS
W
Reset:
000
0111
UCTSn
Figure 23-10. UART Input Port Changed Registers (UIPCRn)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3