- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359153 > MCF52235 (飛思卡爾半導(dǎo)體(中國)有限公司) ColdFire Microcontroller PDF資料下載
參數(shù)資料
| 型號： | MCF52235 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | ColdFire Microcontroller |
| 中文描述： | ColdFire微控制器 |
| 文件頁數(shù)： | 8/50頁 |
| 文件大?。?/td> | 656K |
| 代理商： | MCF52235 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁當(dāng)前第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁
MCF52235 ColdFire Microcontroller, Rev. 3
MCF52235 Family Configurations
Freescale Semiconductor
8
— Unique vector number for each interrupt source
— Ability to mask any individual interrupt source or all interrupt sources (global mask-all)
— Support for hardware and software interrupt acknowledge (IACK) cycles
— Combinatorial path to provide wake-up from low power modes
DMA controller
— Four fully programmable channels
— Dual-address transfer support with 8-, 16-, and 32-bit data capability, along with support for 16-byte (4 x 32-bit)
burst transfers
— Source/destination address pointers that can increment or remain constant
— 24-bit byte transfer counter per channel
— Auto-alignment transfers supported for efficient block movement
— Bursting and cycle steal support
— Software-programmable DMA requesters for the UARTs (3) and 32-bit timers (4)
Reset
— Separate reset in and reset out signals
— Seven sources of reset:
–
Power-on reset (POR)
–
External
–
Software
–
Watchdog
–
Loss of clock
–
Loss of lock
–
Low-voltage detection (LVD)
— Status flag indication of source of last reset
Chip integration module (CIM)
— System configuration during reset
— Selects one of three clock modes
— Configures output pad drive strength
— Unique part identification number and part revision number
General purpose I/O interface
— Up to 56 bits of general purpose I/O
— Bit manipulation supported via set/clear functions
— Programmable drive strengths
— Unused peripheral pins may be used as extra GPIO
JTAG support for system level board testing
1.2.2
V2 Core Overview
The version 2 ColdFire processor core is comprised of two separate pipelines decoupled by an instruction buffer. The two-stage
instruction fetch pipeline (IFP) is responsible for instruction-address generation and instruction fetch. The instruction buffer is
a first-in-first-out (FIFO) buffer that holds prefetched instructions awaiting execution in the operand execution pipeline (OEP).
The OEP includes two pipeline stages. The first stage decodes instructions and selects operands (DSOC); the second stage
(AGEX) performs instruction execution and calculates operand effective addresses, if needed.
The V2 core implements the ColdFire instruction set architecture revision A+ with added support for a separate user stack
pointer register and four new instructions to assist in bit processing. Additionally, the MCF52235 core includes the enhanced
multiply-accumulate (EMAC) unit for improved signal processing capabilities. The EMAC implements a three-stage arithmetic
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCF5232CAB80 | Integrated Microprocessor Hardware Specification |
| MCF5232 | Integrated Microprocessor Hardware Specification |
| MCF5249 | CodeWarrior Development Studio for ColdFire㈢ Architectures |
| MCF5251_07 | ColdFire㈢ Microprocessor Data Sheet |
| MCF5251 | ColdFire Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCF52235_06 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ColdFire㈢ Microcontroller |
| MCF52235_07 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MCF52235_10 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MCF52235 ColdFire Microcontroller Data Sheet |
| MCF52235CAL60 | 功能描述:32位微控制器 - MCU KIRIN2E EPP RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT |
| MCF52235CAL60A | 制造商:Freescale Semiconductor 功能描述:KIRIN2E EPP - REV A - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。