參數(shù)資料
型號: MCF51QE96CLK
廠商: Freescale Semiconductor
文件頁數(shù): 17/38頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 96K FLASH 80-LQFP
產(chǎn)品培訓模塊: Flexis QE Series Low Power Features
標準包裝: 90
系列: MCF51QE
核心處理器: Coldfire V1
芯體尺寸: 32-位
速度: 50MHz
連通性: I²C,SCI,SPI
外圍設(shè)備: LVD,PWM,WDT
輸入/輸出數(shù): 70
程序存儲器容量: 96KB(96K x 8)
程序存儲器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 24x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-LQFP
包裝: 托盤
MCF51QE128 Series Data Sheet, Rev. 7
Electrical Characteristics
Freescale Semiconductor
24
3.10.3
SPI Timing
Table 15 and Figure 18 through Figure 21 describe the timing requirements for the SPI system.
Table 15. SPI Timing
No.
C
Function
Symbol
Min
Max
Unit
—D
Operating frequency
Master
Slave
fop
fBus/2048
0
fBus/2
fBus/4
Hz
1D
SPSCK period
Master
Slave
tSPSCK
2
4
2048
tcyc
2D
Enable lead time
Master
Slave
tLead
1
/2
1
tSPSCK
tcyc
3D
Enable lag time
Master
Slave
tLag
1
/2
1
tSPSCK
tcyc
4D
Clock (SPSCK) high or low time
Master
Slave
tWSPSCK
tcyc – 30
1024 tcyc
ns
5D
Data setup time (inputs)
Master
Slave
tSU
15
ns
6D
Data hold time (inputs)
Master
Slave
tHI
0
25
ns
7
D
Slave access time
ta
—1
tcyc
8
D
Slave MISO disable time
tdis
—1
tcyc
9D
Data valid (after SPSCK edge)
Master
Slave
tv
25
ns
10
D
Data hold time (outputs)
Master
Slave
tHO
0
ns
11
D
Rise time
Input
Output
tRI
tRO
tcyc – 25
25
ns
12
D
Fall time
Input
Output
tFI
tFO
tcyc – 25
25
ns
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