參數(shù)資料
型號: MC9S12UF32PB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 60 MHz, MICROCONTROLLER, PQFP64
封裝: LQFP-64
文件頁數(shù): 41/128頁
文件大?。?/td> 1785K
代理商: MC9S12UF32PB
2
Freescale Semiconductor
Freescale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliability,
function or design. Freescale Semiconductor does not assume any liability arising out of the application or use of any product or
circuit described herein; neither does it convey any license under its patent rights nor the rights of others. Freescale
Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant
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Freescale Semiconductor, Inc. 2004
Revision History
Release
Number
Date
Author
Summary of Changes
00.01
17JAN02
Y.H. Cheng
Initial Version
00.02
19FEB02
Y.H. Cheng
Modied SMRAM mapping to allow 1k byte 16-bit block mappable
to Vector Space. Update spec with review feedback.
00.03
26APR02
Y.H. Cheng
Modied Device pinout to separate D+ D- for high speed and low
speed operation. Remap Timer pins to Port R. Update BG
references.
00.04
16SEP02
Y.H. Cheng
Modied Device pinout per IP requirement
Add SCI
Update Interrupt information.
00.05
25SEP02
Y.H. Cheng
Change pin location for REF3V and VREGEN
minor update on module name references
remove references to pseudo stop and clock monitor
00.06
03JUN03
Y.H. Cheng
- Updated info for SMRAM3P5K2E in device memory map
- Updated EXTAL and XTAL supply rail information.
- Relocate SCI module base address from $70 to $C8
- Relocate ATA5HC module base address from $240 to $1C0
- Relocate PIM module base address from $80 to $240
- Relocate Interrupt Vectors
- Updated Phy evaluation pinout.
- Updated CFA00, CFA01 and CFA02 pin name to CFA0, CFA1 and
CFA2 respectively.
- Removed ESD and Latchup section in Electrical.
- Update Block Guide References
- Miscellaneous Typo mistakes.
00.07
11JUN03
Y.H. Cheng
- Update typo in interrupt vector table for Vector $C2
- Update typo in pin order of IOC[7:4] in signal properties table
- Specify run and wait IDDs in Electrical Section
- Specify stop IDD at room temperature in Electrical Section
00.08
13JUL03
Y.H. Cheng
- Change specication to include 64 pin option
- ROMCTL pin assigned to PJ2
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