List of Tables
MC9S12T64Revision 1.1.1
16
List of Tables
MOTOROLA
Table 40
Table 41
Table 42
Table 43
Table 44
Table 45
Table 46
Table 47
Table 48
Table 49
Table 50
Table 51
Table 52
Table 53
Table 54
Table 55
Table 56
Table 57
Table 58
Table 59
Table 60
Table 61
Table 62
Table 63
Table 64
Table 65
Table 66
Table 67
Table 68
Table 69
Table 70
Table 71
Table 72
Table 73
Table 74
Table 75
Table 76
Table 77
Table 78
Table 79
Table 80
Table 81
Table 82
Table 83
Table 84
Table 85
Table 86
Security States.................................................................................................. 208
Register Bank Selects....................................................................................... 210
Loading of the Protection Register from Flash.................................................. 211
Higher Address Range Protection..................................................................... 212
Lower Address Range Protection ..................................................................... 213
Valid User Mode Commands ............................................................................ 216
Flash Interrupt Sources..................................................................................... 232
Example CALRAM Mapping ............................................................................. 242
Port Reset State and Priority Summary ............................................................ 252
Pin Configuration Summary .............................................................................. 255
Clock Selection Based on XCLKS at reset ....................................................... 278
RTI Frequency Divide Rates............................................................................. 289
COP Watchdog Rates....................................................................................... 292
MCU configuration during Wait Mode ............................................................... 306
Outcome of Clock Loss in Wait Mode............................................................... 309
Outcome of Clock Loss in Pseudo-Stop Mode ................................................. 314
Reset Summary ................................................................................................ 318
Reset Vector Selection...................................................................................... 319
Relation between PORLVDRF and LVDF......................................................... 323
CRG Interrupt Vectors....................................................................................... 324
Clock B Prescaler Selects................................................................................. 341
Clock A Prescaler Selects................................................................................. 341
PWM Timer Counter Conditions........................................................................ 360
16-bit Concatenation Mode Summary............................................................... 366
PWM Boundary Cases...................................................................................... 367
Compare Result Output Action ......................................................................... 385
Edge Detector Circuit Configuration.................................................................. 386
Prescaler Selection ........................................................................................... 388
Pin Action.......................................................................................................... 392
Clock Selection .................................................................................................392
Modulus Counter Prescaler Select.................................................................... 397
Delay Counter Select ........................................................................................ 400
ECT Interrupts...................................................................................................416
Loop Functions.................................................................................................. 426
Example of 8-bit Data Formats ......................................................................... 436
Example of 9-Bit Data Formats......................................................................... 436
Baud Rates (Example: Bus Clock = 16.0 MHz) ................................................ 437
Start Bit Verification.......................................................................................... 444
Data Bit Recovery ............................................................................................. 445
Stop Bit Recovery ............................................................................................. 445
SCI Interrupt Sources........................................................................................ 454
SS Input / Output Selection............................................................................... 463
Bidirectional Pin Configurations ........................................................................ 465
SPI Baud Rate Selection (16 MHz Bus Clock).................................................. 466
Normal Mode and Bidirectional Mode............................................................... 481
SPI Interrupt Signals .........................................................................................485
External Trigger Configurations ....................................................................... 495
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