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參數(shù)資料
| 型號： | MC9S12C32VPB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP52 |
| 封裝： | LQFP-52 |
| 文件頁數(shù)： | 18/94頁 |
| 文件大?。?/td> | 906K |
| 代理商： | MC9S12C32VPB |
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Device User Guide — 9S12C32DGV1/D V01.01
25
2.2 Detailed Signal Descriptions
2.2.1 EXTAL, XTAL — Oscillator Pins
EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived
from the EXTAL input frequency. XTAL is the crystal output.
2.2.2 RESET — External Reset Pin
RESET is an active low bidirectional control signal that acts as an input to initialize the MCU to a known
start-up state. It also acts as an open-drain output to indicate that an internal failure has been detected in
either the clock monitor or COP watchdog circuit. External circuitry connected to the RESET pin should
not include a large capacitance that would interfere with the ability of this signal to rise to a valid logic one
within 32 ECLK cycles after the low drive is released. Upon detection of any reset, an internal circuit
drives the RESET pin low and a clocked reset sequence controls when the MCU can begin normal
processing. This pin includes an internal pull up device.
2.2.3 TEST / VPP — Test Pin
This pin is reserved for test and must be tied to VSS in all applications.
2.2.4 XFC — PLL Loop Filter Pin
Dedicated pin used to create the PLL loop filter. See CRG BUG for more detailed information.
2.2.5 BKGD / TAGHI / MODC — Background Debug, Tag High & Mode Pin
The BKGD / TAGHI / MODC pin is used as a pseudo-open-drain pin for the background debug
communication. In MCU expanded modes of operation when instruction tagging is on, an input low on
this pin during the falling edge of E-clock tags the high half of the instruction word being read into the
instruction queue. It is also used as a MCU operating mode select pin at the rising edge during reset, when
the state of this pin is latched to the MODC bit.
2.2.6 PA[7:0] / ADDR[15:8] / DATA[15:8] — Port A I/O Pins
PA7-PA0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus. PA[7:1] pins are not available in the 48 package
version. PA[7:3] are not available in the 52 pin package version.
2.2.7 PB[7:0] / ADDR[7:0] / DATA[7:0] — Port B I/O Pins
PB7-PB0 are general purpose input or output pins. In MCU expanded modes of operation, these pins are
used for the multiplexed external address and data bus. PB[7:5] and PB[3:0] pins are not available in the
48 nor 52 pin package version.
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相關(guān)代理商/技術(shù)參數(shù) |
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| MC9S12C32VPBE16 | 功能描述:16位微控制器 - MCU GOLDFISH RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC9S12C32VPBE25 | 制造商:Freescale Semiconductor 功能描述:16BIT FLASH MCU CAN SMD QFP52 |
| MC9S12C64CFAE | 功能描述:16位微控制器 - MCU 9S12C64 (KOI) RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC9S12C64CFAER | 功能描述:16位微控制器 - MCU 9S12C64 (KOI) RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
| MC9S12C64CFUE | 功能描述:16位微控制器 - MCU 9S12C64 (KOI) - PB FREE RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT |
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