參數(shù)資料
型號(hào)： MC9S08MP12VWL
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 50.33 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁(yè)數(shù)： 35/36頁(yè)
文件大?。?/td> 762K
代理商： MC9S08MP12VWL
MC9S08MP16 Series Data Sheet, Rev. 2
Electrical Characteristics
Freescale Semiconductor
8
2
Electrical Characteristics
2.1
Introduction
This section contains electrical and timing specifications for the MC9S08MP16 Series of microcontrollers available at the time
of publication.
35
——
PTE4
36
23
25
PTB4
KBI1P4
ADP46
37
24
26
PTB5
KBI1P5
CMP2OUT2
ADP56
38
25
27
PTB6
KBI1P6
CMP3OUT3
ADP66
39
26
—
PTB7
KBI1P7
ADP76
40
27
—
PTE5
XTAL
41
28
—
PTE6
EXTAL
42
29
—
VSS2
43
——
VDD2
44
30
28
PTF0
BKGD
MS
45
31
1
PTC0
KBI2P0
FTM2CH0
46
32
2
PTC1
KBI2P1
FTM2CH1
47
1
3
PTC2
KBI2P2
FTM2CH2
48
2
4
PTC3
KBI2P3
FTM2CH3
1 TCLK pin can be repositioned using TCLKPS in SOPT2. Default reset location is PTC7.
2 HSCMP2 output CMP2OUT can be repositioned using the CMP2OPS in the SOPT2 register.
Default reset location is PTD6.
3 HSCMP3 output CMP3OUT can be repositioned using the CMP3OPS in the SOPT2 register.
Default reset location is PTD7.
4 Pin is open drain with an internal pullup that is always enabled. Pin does not contain a clamp
diode to VDD and should not be driven above VDD. The voltage measured on the internally
pulled up RESET will not be pulled to VDD. The internal gates connected to this pin are pulled
to VDD.
5 IIC pins SDA and SCL can be repositioned using IICPS in SOPT2. Default reset locations are
PTD0 and PTD1.
6 If ADC, HSCMP, or PGA is enabling a shared analog input pin, each has access to the pin.
Table 1. Pin Availability by Package Pin-Count (continued)
Pin Number
<-- Lowest
Priority
--> Highest
48
32
LQFP
28
Port Pin
Alt 1
Alt 2
Alt3
Alt4
相關(guān)PDF資料
PDF描述
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