參數(shù)資料
型號： MC9S08MP12VWL
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 50.33 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 24/36頁
文件大?。?/td> 762K
代理商： MC9S08MP12VWL
MC9S08MP16 Series Data Sheet, Rev. 2
Electrical Characteristics
Freescale Semiconductor
30
2.14.4
SPI
Table 19 and Figure 22 through Figure 25 describe the timing requirements for the SPI system.
Table 19. SPI Electrical Characteristics
Num1
1 Refer to Figure 22 through Figure 25.
CRating2
2 All timing is shown with respect to 20% V
DD and 70% VDD, unless noted; 100 pF load on all SPI pins. All
timing assumes slew rate control disabled and high drive strength enabled for SPI output pins.
Symbol
Min
Max
Unit
1D
Cycle time
Master
Slave
tSCK
2
4
4096
—
tcyc
2D
Enable lead time
Master
Slave
tLead
—
1/2
—
tSCK
3D
Enable lag time
Master
Slave
tLag
—
1/2
—
tSCK
4D
Clock (SPSCK) high time
Master and Slave
tSCKH
1/2 tSCK – 25
—
ns
5D
Clock (SPSCK) low time
Master and Slave
tSCKL
1/2 tSCK – 25
—
ns
6D
Data setup time (inputs)
Master
Slave
tSI(M)
tSI(S)
30
—
ns
7D
Data hold time (inputs)
Master
Slave
tHI(M)
tHI(S)
30
—
ns
8D
Access time, slave3
3 Time to data active from high-impedance state.
tA
040
ns
9D
Disable time, slave4
4 Hold time to high-impedance state.
tdis
—40
ns
10
D
Data setup time (outputs)
Master
Slave
tSO
—
25
ns
11
D
Data hold time (outputs)
Master
Slave
tHO
–10
—
ns
12
D
Operating frequency
Master (SPIFE=0)
Slave (SPIFE=0)
Master (SPIFE=1)
Slave (SPIFE=1)
fop
fBus/4096
dc
fBus/4096
dc
85
fBus/4
56
56
5 Maximum baud rate must be limited to 8 MHz.
6 Maximum baud rate must be limited to 5 MHz due to input filter characteristics.
MHz
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