參數(shù)資料
型號: MC9328MXLVM20
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 200 MHz, RISC PROCESSOR, PBGA256
封裝: 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MAPBGA-256
文件頁數(shù): 74/82頁
文件大?。?/td> 1452K
代理商: MC9328MXLVM20
76
MC9328MXL Advance Information
MOTOROLA
Specifications
The limitation on pixel clock rise time / fall time are not specified. It should be calculated from the hold
time and setup time, according to:
max rise time allowed = (positive duty cycle - hold time)
max fall time allowed = (negative duty cycle - setup time)
In most of case, duty cycle is 50 / 50, therefore:
max rise time = (period / 2 - hold time)
max fall time = (period / 2 - setup time)
For example: Given pixel clock period = 10ns, duty cycle = 50 / 50, hold time = 1ns, setup time = 1ns.
positive duty cycle = 10 / 2 = 5ns
=> max rise time allowed = 5 - 1 = 4ns
negative duty cycle = 10 / 2 = 5ns
=> max fall time allowed = 5 - 1 = 4ns
Falling-edge latch data
max fall time allowed = (negative duty cycle - hold time)
max rise time allowed = (positive duty cycle - setup time)
2
csi_d setup time
1
ns
3
csi_d hold time
1
ns
4
csi_pixclk high time
10.42
ns
5
csi_pixclk low time
10.42
ns
6
csi_pixclk frequency
0
48
MHz
Table 32. Non-Gated Clock Mode Parameters (Continued)
Ref No.
Parameter
Min
Max
Unit
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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