參數(shù)資料
型號: MC9328MXLVM20
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 200 MHz, RISC PROCESSOR, PBGA256
封裝: 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MAPBGA-256
文件頁數(shù): 39/82頁
文件大?。?/td> 1452K
代理商: MC9328MXLVM20
44
MC9328MXL Advance Information
MOTOROLA
Specifications
3.9 SPI Timing Diagrams
To utilize the internal transmit (TX) and receive (RX) data FIFOs when the SPI 1 module is configured as
a master, two control signals are used for data transfer rate control: the SS signal (output) and the
SPI_RDY signal (input). The SPI 1 Sample Period Control Register (PERIODREG1) and the SPI 2
Sample Period Control Register (PERIODREG2) can also be programmed to a fixed data transfer rate for
either SPI 1 or SPI 2. When the SPI 1 module is configured as a slave, the user can configure the SPI 1
Control Register (CONTROLREG1) to match the external SPI master’s timing. In this configuration, SS
becomes an input signal, and is used to latch data into or load data out to the internal data shift registers, as
well as to increment the data FIFO. Figure 31 through Figure 35 show the timing relationship of the master
SPI using different triggering mechanisms.
Figure 31. Master SPI Timing Diagram Using SPI_RDY Edge Trigger
Figure 32. Master SPI Timing Diagram Using SPI_RDY Level Trigger
Figure 33. Master SPI Timing Diagram Ignore SPI_RDY Level Trigger
Figure 34. Slave SPI Timing Diagram FIFO Advanced by BIT COUNT
1
2
3
5
4
SS
SPIRDY
SCLK, MOSI, MISO
SS
SPIRDY
SCLK, MOSI, MISO
SS (output)
SS (input)
SCLK, MOSI, MISO
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC9328MXLVM20 制造商:Freescale Semiconductor 功能描述:Microprocessor
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MC9328MXLVP15R2 功能描述:處理器 - 專門應(yīng)用 DRAGONBALL MXL 225 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432