參數(shù)資料
型號(hào)： MC9328MXLDVM15
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 150 MHz, RISC PROCESSOR, PBGA256
封裝： 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256
文件頁(yè)數(shù)： 56/89頁(yè)
文件大?。?/td> 1869K
代理商： MC9328MXLDVM15
6
MC9328MXL Advance Information
MOTOROLA
Signals and Connections
CAS
SDRAM/SyncFlash Column Address Select signal
SDWE
SDRAM/SyncFlash Write Enable signal
SDCKE0
SDRAM/SyncFlash Clock Enable 0
SDCKE1
SDRAM/SyncFlash Clock Enable 1
SDCLK
SDRAM/SyncFlash Clock
RESET_SF
SyncFlash Reset
Clocks and Resets
EXTAL16M
Crystal input (4 MHz to 16 MHz), or a 16 MHz oscillator input when the internal oscillator
circuit is shut down.
XTAL16M
Crystal output
EXTAL32K
32 kHz crystal input
XTAL32K
32 kHz crystal output
CLKO
Clock Out signal selected from internal clock signals.
RESET_IN
Master Reset—External active low Schmitt trigger input signal. When this signal goes
active, all modules (except the reset module and the clock control module) are reset.
RESET_OUT
Reset Out—Internal active low output signal from the Watchdog Timer module and is
asserted from the following sources: Power-on reset, External reset (RESET_IN), and
Watchdog time-out.
POR
Power On Reset—Internal active high Schmitt trigger input signal. The POR signal is
normally generated by an external RC circuit designed to detect a power-up event.
JTAG
TRST
Test Reset Pin—External active low signal used to asynchronously initialize the JTAG
controller.
TDO
Serial Output for test instructions and data. Changes on the falling edge of TCK.
TDI
Serial Input for test instructions and data. Sampled on the rising edge of TCK.
TCK
Test Clock to synchronize test logic and control register access through the JTAG port.
TMS
Test Mode Select to sequence the JTAG test controller’s state machine. Sampled on the
rising edge of TCK.
DMA
BIG_ENDIAN
Big Endian—Input signal that determines the configuration of the external chip-select
space. If it is driven logic-high at reset, the external chip-select space will be configured to
little endian. If it is driven logic-low at reset, the external chip-select space will be
configured to big endian.
DMA_REQ
External DMA request pin.
Table 2. MC9328MXL Signal Descriptions (Continued)
Signal Name
Function/Notes
相關(guān)PDF資料
PDF描述
MC9328MXLVH15 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
MC9328MXLDVP15 150 MHz, RISC PROCESSOR, PBGA225
MC9328MXLDVF15 150 MHz, RISC PROCESSOR, PBGA225
MC9328MXLVF15 32-BIT, 150 MHz, RISC PROCESSOR, PBGA225
MC9328MXLVH20 32-BIT, 200 MHz, RISC PROCESSOR, PBGA256
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC9328MXLDVM15R2 功能描述:處理器 - 專門(mén)應(yīng)用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MXLDVM20 功能描述:處理器 - 專門(mén)應(yīng)用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MXLDVM20R2 功能描述:處理器 - 專門(mén)應(yīng)用 DRAGONBALL CORSICA PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MXLDVP15 功能描述:處理器 - 專門(mén)應(yīng)用 DRAGONBALL MXL 225 PB-FR RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MXLDVP15R2 制造商:Freescale Semiconductor 功能描述:APPLICATIONS PROCESSOR 225-PIN MA-BGA T/R - Tape and Reel
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