參數(shù)資料
型號(hào): MC9328MXLCVM15
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
封裝: 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MAPBGA-256
文件頁數(shù): 61/90頁
文件大?。?/td> 1242K
代理商: MC9328MXLCVM15
Functional Description and Application Information
MC9328MXL Technical Data, Rev. 8
64
Freescale Semiconductor
4.7.2
SDIO-IRQ and ReadWait Service Handling
In SDIO, there is a 1-bit or 4-bit interrupt response from the SDIO peripheral card. In 1-bit mode, the
interrupt response is simply that the SD_DAT[1] line is held low. The SD_DAT[1] line is not used as data
in this mode. The memory controller generates an interrupt according to this low and the system interrupt
continues until the source is removed (SD_DAT[1] returns to its high level).
In 4-bit mode, the interrupt is less simple. The interrupt triggers at a particular period called the “Interrupt
Period” during the data access, and the controller must sample SD_DAT[1] during this short period to
determine the IRQ status of the attached card. The interrupt period only happens at the boundary of each
block (512 bytes).
Figure 48. SDIO IRQ Timing Diagram
ReadWait is another feature in SDIO that allows the user to submit commands during the data transfer. In
this mode, the block temporarily pauses the data transfer operation counter and related status, yet keeps
the clock running, and allows the user to submit commands as normal. After all commands are submitted,
the user can switch back to the data transfer operation and all counter and status values are resumed as
access continues.
Command read cycle
NRC
8
Clock cycles
Command-command cycle
NCC
8
Clock cycles
Command write cycle
NWR
2
Clock cycles
Stop transmission cycle
NST
2
Clock cycles
TAAC: Data read access time -1 defined in CSD register bit[119:112]
NSAC: Data read access time -2 in CLK cycles (NSAC100) defined in CSD register bit[111:104]
Table 24. Timing Values for Figure 43 through Figure 47 (Continued)
Parameter
Symbol
Minimum
Maximum
Unit
Interrupt Period
IRQ
DAT[1]
For 4-bit
L H
Interrupt Period
DAT[1]
For 1-bit
CMD
Content
S T
E Z Z P
E Z Z
******
Z Z
Response
CRC
S
Z
E
S
Block Data
E
S
Block Data
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MXL
Product
Family
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