參數(shù)資料
型號: MC9328MX21VK
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, MICROPROCESSOR, PBGA289
封裝: 14 X 14 MM, 1.41 MM HEIGHT, 0.65 MM PITCH, LEAD FREE, PLASTIC, MAPBGA-289
文件頁數(shù): 10/100頁
文件大小: 1979K
代理商: MC9328MX21VK
Specifications
MC9328MX21 Technical Data, Rev. 3.4
Freescale Semiconductor
17
All timing is measured at 30 pF loading with the exception of fast I/O signals as discussed below. Refer
to the reference manual’s System Control Chapter for details on drive strength settings.
Table 8 provides the maximum loading guidelines that can be tolerated on a memory I/O signal (also
known as Fast I/O) to achieve 133 MHz operation. These critical signals include the SDRAM Clock
(SDCLK), Data Bus signals (D[31:0]), lower order address signals such as A0-A10, MA10, MA11, and
other signals required to meet 133 MHz timing.
The values shown in Table 8 apply over the recommended operating temperature range. Care must be
taken to minimize parasitic capacitance of associated printed circuit board traces.
3.5
DPLL Timing Specifications
Parameters of the DPLL are given in Table 11. In this table, Tref is a reference clock period after the
predivider and Tdck is the output double clock period.
Table 8. Loading Guidelines for Fast IO Signals to Achieve 133 MHz Operation
Drive Strength Setting (DSCR2–DSCR12)
Maximum I/O Loading at 1.8 V
Maximum I/O Loading at 3.0 V
000: 3.5 mA
9 pF
12 pF
001: 4.5 mA
12 pF
16 pF
011: 5.5 mA
15 pF
21 pF
111: 6.5 mA
19 pF
26 pF
Table 9. 32k/26M Oscillator Signal Timing
Parameter
Minimum
RMS
Maximum
Unit
EXTAL32k input jitter (peak to peak) for both System PLL and MCUPLL
5
20
ns
EXTAL32k input jitter (peak to peak) for MCUPLL only
5
100
ns
EXTAL32k startup time
800
ms
Table 10. CLKO Rise/Fall Time (at 30pF Loaded)
Best Case
Typical
Worst Case
Units
Rise Time
0.80
1.00
1.40
ns
Fall Time
0.74
1.08
1.67
ns
Table 11. DPLL Specifications
Parameter
Test Conditions
Minimum
Typical
Maximum
Unit
Reference clock frequency range
Vcc = 1.5V
16
320
MHz
Pre-divider output clock frequency
range
Vcc = 1.5V
16
32
MHz
Double clock frequency range
Vcc = 1.5V
220
560
MHz
Pre-divider factor (PD)
1
16
Total multiplication factor (MF)
Includes both integer and fractional parts
5
15
相關PDF資料
PDF描述
MC9328MX21DVK 32-BIT, 266 MHz, MICROPROCESSOR, PBGA289
MC9328MX21VH 266 MHz, MICROPROCESSOR, PBGA289
MC9328MX21CVG 266 MHz, MICROPROCESSOR, PBGA289
MC9328MX21CVH 266 MHz, MICROPROCESSOR, PBGA289
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