參數(shù)資料
型號(hào)： MC9328MX21CVG
廠商： FREESCALE SEMICONDUCTOR INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 266 MHz, MICROPROCESSOR, PBGA289
封裝： 14 X 14 MM, 1.41 MM HEIGHT, 0.65 MM PITCH, MAPBGA-289
文件頁(yè)數(shù)： 65/106頁(yè)
文件大小： 1932K
代理商： MC9328MX21CVG
Specifications
MC9328MX21 Product Preview, Rev. 1.1
Freescale Semiconductor
61
3.17
1-Wire Interface Timing
3.17.1
Reset Sequence with Reset Pulse Presence Pulse
To begin any communications with the DS2502, it is required that an initialization procedure be issued. A
reset pulse must be generated and then a presence pulse must be detected. The minimum reset pulse length
is 480 us. The bus master (one-wire) will generate this pulse, then after the DS2502 detects a rising edge
on the one-wire bus, it will wait 15-60 us before it will transmit back a presence pulse. The presence pulse
will exist for 60-240 us.
The timing diagram for this sequence is shown in Figure 46.
24
(Tx) CK high to FS (wl) low
9.62
17.10
7.90
15.61
ns
25
(Rx) CK high to FS (wl) low
10.30
19.54
8.58
18.05
ns
26
(Tx) CK high to STXD valid from high impedance
9.02
16.46
7.29
14.97
ns
27a
(Tx) CK high to STXD high
8.48
15.32
6.75
13.83
ns
27b
(Tx) CK high to STXD low
8.48
15.32
6.75
13.83
ns
28
(Tx) CK high to STXD high impedance
9.02
16.46
7.29
14.97
ns
29
SRXD setup time before (Rx) CK low
1.49
–
1.49
–
ns
30
SRXD hole time after (Rx) CK low
0
–
0
–
ns
Synchronous Internal Clock Operation (SSI3 Ports)
31
SRXD setup before (Tx) CK falling
21.99
–
21.99
–
ns
32
SRXD hold after (Tx) CK falling
0
–
0
–
ns
Synchronous External Clock Operation (SSI3 Ports)
33
SRXD setup before (Tx) CK falling
3.80
–
3.80
–
ns
34
SRXD hold after (Tx) CK falling
0
–
0
–
ns
1. All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables and in the figures.
Table 35. SSI to SSI3 Ports Timing Parameter Table (Continued)
Ref
No.
Parameter
1.8V +/- 0.10V
3.0V +/- 0.30V
Unit
Minimum
Maximum
Minimum
Maximum
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC9328MX21CVH 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:i.MX family of microprocessors
MC9328MX21CVK 功能描述:處理器 - 專(zhuān)門(mén)應(yīng)用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 類(lèi)型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX21CVK 制造商:Freescale Semiconductor 功能描述:Microcontroller
MC9328MX21CVKR2 功能描述:處理器 - 專(zhuān)門(mén)應(yīng)用 DB I.MX21 PB-FR RoHS:否 制造商:Freescale Semiconductor 類(lèi)型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX21CVM 功能描述:處理器 - 專(zhuān)門(mén)應(yīng)用 DB I.MX21 17X17 PB-FR RoHS:否 制造商:Freescale Semiconductor 類(lèi)型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
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