參數(shù)資料
型號(hào)： MC9328MX1CVM15R2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
封裝： 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, MAPBGA-256
文件頁(yè)數(shù)： 30/100頁(yè)
文件大?。?/td> 1267K
代理商： MC9328MX1CVM15R2
Functional Description and Application Information
MC9328MX1 Technical Data, Rev. 7
Freescale Semiconductor
35
4.4.3
EIM External Bus Timing
The External Interface Module (EIM) is the interface to devices external to the i.MX1, including
generation of chip-selects for external peripherals and memory. The timing diagram for the EIM is shown
in Figure 5, and Table 12 defines the parameters of signals.
Table 16. WAIT Write Cycle DMA Enabled: WSC = 111111, DTACK_SEL=1, HCLK=96MHz
Number
Characteristic
3.0 ± 0.3 V
Unit
Minimum
Maximum
1
CS5 assertion time
See note 2
–
ns
2EB assertion time
See note 2
–
ns
3CS5 pulse width
3T
–
ns
4RW negated before CS5 is negated
2.5T-0.29
2.5T+0.68
ns
5
Address inactived after CS negated
–
0.93
ns
6
Wait asserted after CS5 asserted
–
1020T
ns
7
Wait asserted to RW negated
T+2.15
2T+7.34
ns
8
Data hold timing after RW negated
24.87
–
ns
9
Data ready after CS5 is asserted
–
T
ns
10
CS deactive to next CS active
T
–
ns
11
EB negate after CS negate
1.5T+0.74
1.5T+2.35
12
Wait becomes low after CS5 asserted
0
1019T
ns
13
Wait pulse width
1T
1020T
ns
Note:
1. T is the system clock period. (For 96 MHz system clock, T=10.42 ns)
2. CS5 assertion can be controlled by CSA bits. EB assertion also can be programmable by WEA bits in CS5L register.
3. Address becomes valid and RW asserts at the start of write access cycle.
4.The external wait input requirement is eliminated when CS5 is programmed to use internal wait state.
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX1
Product
Family
相關(guān)PDF資料
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MC9328MX1VM20R2 32-BIT, 200 MHz, RISC PROCESSOR, PBGA256
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MC9328MX1DVM15R2 功能描述:處理器 - 專門應(yīng)用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX1DVM20 功能描述:處理器 - 專門應(yīng)用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
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