
PLL Tuned UHF Transmitter Module
Data Sheet
MC68HC908QF4 — Rev. 1.0
104
PLL Tuned UHF Transmitter Module
MOTOROLA
12.5 Modulation
If a low-logic level is applied on pin MODE, then the on/off keying (OOK)
modulation is selected. This modulation is performed by switching on/off the RF
output stage. The logic level applied on pin DATA controls the output stage state:
DATA = 0
→ output stage off
DATA = 1
→ output stage on
If a high-logic level is applied on pin MODE, then frequency shift keying (FSK)
modulation is selected. This modulation is achieved by modulating the frequency
of the reference oscillator. This frequency change is performed by switching the
external crystal load capacitor. The logic level applied on pin DATA controls the
internal switch connected to pin CFSK:
DATA = 0
→ switch off
DATA = 1
→ switch on
In case of Figure 12-6, where the two capacitors C6 and C9 are in series:
DATA = 0 leads to the high value of the carrier frequency
DATA = 1 leads to the low value of the carrier frequency
This crystal pulling solution implies that the RF output frequency deviation equals
the crystal frequency deviation multipled by the PLL divider ratio (see Table 12-1).
12.6 Microcontroller Interfaces
Four digital input pins (ENABLE, DATA, BAND, and MODE) enable the circuit to
be controlled by a microcontroller. It is recommended to configure the band
frequency and the modulation type before enabling the circuit. In a typical
application the input pins BAND and MODE are hardwired.
One digital output (DATACLK) provides the microcontroller a reference frequency
for data clocking. This frequency is equal to the crystal oscillator frequency divided
Table 12-2. DATACLK Frequency
versus Crystal Oscillator Frequency
Crystal Oscillator Frequency
(MHz)
DATACLK Frequency
(kHz)
9.84
154
13.56
212
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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