
System Integration Module (SIM)
Reset and System Initialization
MC68HC908QF4 — Rev. 1.0
Data Sheet
MOTOROLA
System Integration Module (SIM)
123
14.4.1 External Pin Reset
The RST pin circuits include an internal pullup device. Pulling the asynchronous
RST pin low halts all processing. The PIN bit of the SIM reset status register
(SRSR) is set as long as RST is held low for at least the minimum tRL time.
Figure 14-4 shows the relative timing. The RST pin function is only available if the
RSTEN bit is set in the CONFIG1 register.
Figure 14-4. External Reset Timing
14.4.2 Active Resets from Internal Sources
The RST pin is initially setup as a general-purpose input after a POR. Setting the
RSTEN bit in the CONFIG1 register enables the pin for the reset function. This
section assumes the RSTEN bit is set when describing activity on the RST pin.
All internal reset sources actively pull the RST pin low for 32 BUSCLKX4 cycles to
allow resetting of external peripherals. The internal reset signal IRST continues to
be asserted for an additional 32 cycles (see Figure 14-5). An internal reset can be
caused by an illegal address, illegal opcode, COP time out, LVI, or POR (see
NOTE:
For POR and LVI resets, the SIM cycles through 4096 BUSCLKX4 cycles during
which the SIM forces the RST pin low. The internal reset signal then follows the
sequence from the falling edge of RST shown in Figure 14-5.
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals and other
chips within a system built around the MCU.
Figure 14-5. Internal Reset Timing
RST
ADDRESS BUS
PC
VECT H
VECT L
BUSCLKX2
IRST
RST
RSTPULLEDLOWBYMCU
ADDRESS
32 CYCLES
VECTOR HIGH
BUSCLKX4
BUS
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Freescale Semiconductor, Inc.
For More Information On This Product,
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