參數(shù)資料
型號： MC88915TFN55
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 時鐘及定時
英文描述： 88915 SERIES, PLL BASED CLOCK DRIVER, 7 TRUE OUTPUT(S), 1 INVERTED OUTPUT(S), PQCC28
封裝： PLASTIC, LCC-28
文件頁數(shù)： 17/18頁
文件大?。?/td> 401K
代理商： MC88915TFN55
MC88915T
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
33
MC88915TFN133
Table 12. SYNC Input Timing Requirements
Symbol
Parameter
Minimum
Maximum
Unit
tRISE/FALL, SYNC Inputs Rise/Fall Time, SYNC Inputs from 0.8 to 2.0 V
—
3.0
ns
tCYCLE, SYNC Inputs
Input Clock Period SYNC Inputs
15.01
1. These tCYCLE minimum values are valid when “Q” output is fed back and connected to the FEEDBACK pin. This is the configuration shown in
1002
2. Information in Table 22 and in Note 3 of the AC specification notes describe this specification with its limits depending on what output is fed back,
and if FREQ_SEL is high or low.
ns
Duty Cycle SYNC Inputs Input Duty Cycle SYNC Inputs
50% ± 25%
Table 13. DC Electrical Characteristics (Voltages Referenced to GND) TA = –40°C to +85°C, VCC = 5.0 V ± 5%
Symbol
Parameter
Test Conditions
VCC
V
Target
Limit
Unit
VIH
Minimum High-Level Input Voltage
Vout = 0.1 V or VCC – 0.1 V
4.75
5.25
2.0
V
VIL
Maximum Low-Level Input Voltage
Vout = 0.1 V or VCC – 0.1 V
4.75
5.25
0.8
V
VOH
Minimum High-Level Output Voltage
Vin = VIH or VIL
IOH = –36 mA1
1. IOL and IOH are 12 mA and –12 mA respectively for the LOCK output.
4.75
5.25
4.01
4.51
V
VOL
Maximum Low-Level Output Voltage
Vin = VIH or VIL
IOH = 36 mA1
4.75
5.25
0.44
V
Iin
Maximum Input Leakage Current
VI = VCC or GND
5.25
± 1.0
A
ICCT
Maximum ICC/Input
VI = VCC –2.1 V
5.25
2.02
2. The PLL_EN input pin is not guaranteed to meet this specification.
mA
IOLD
Minimum Dynamic Output Current3
3. Maximum test duration is 2.0 ms, one output loaded at a time.
VOLD = 1.0 V Maximum
5.25
88
mA
IOHD
VOHD = 3.85 V Minimum
5.25
–88
mA
ICC
Maximum Quiescent Supply Current (per Package)
VI = VCC or GND
5.25
1.0
mA
IOZ
Maximum 3-State Leakage Current
VI = VIH or VIL; VO = VCC or GND
5.25
± 504
4. Specification value for IOZ is preliminary, will be finalized upon “MC” status.
A
Table 14. Capacitance and Power Specifications
Symbol
Parameter
Typical Values
Unit
Conditions
CIN
Input Capacitance
4.5
pF
VCC = 5.0 V
CPD
Power Dissipation Capacitance
40
pF
VCC = 5.0 V
PD11
1. PD1 nd PD2 mW/Output numbers are for a “Q” output.
Power Dissipation @ 50 MHz with 50
Thevenin Termination
23 mW/Output
184 mW/Device
mW
VCC = 5.0 V
T = 25°C
PD21
Power Dissipation @ 50 MHz with 50
Parallel Termination to GND
57 mW/Output
456 mW/Device
mW
VCC = 5.0 V
T = 25°C
Table 15. Frequency Specifications (TA = –40°C to +85 °C, VCC = 5.0 V ± 5%)
Symbol
Parameter
Guaranteed Minimum
Unit
TFN133
fmax1
1. Maximum Operating Frequency is guaranteed with the part in a phase-locked condition, and all outputs loaded with 50
terminated to VCC/2.
Maximum Operating Frequency (2X_Q Output)
133
MHz
Maximum Operating Frequency (Q0–Q4, Q5 Output)
66
MHz
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