參數(shù)資料
型號: MC8641VU1250NC
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROPROCESSOR, CBGA1023
封裝: 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023
文件頁數(shù): 117/140頁
文件大?。?/td> 1484K
代理商: MC8641VU1250NC
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
78
Freescale Semiconductor
PCI Express
The eye diagram must be valid for any 250 consecutive UIs.
A recovered TX UI is calculated over 3500 consecutive unit intervals of sample data. The eye diagram is
created using all edges of the 250 consecutive UI in the center of the 3500 UI used for calculating the TX
UI.
NOTE
The reference impedance for return loss measurements is 50
Ω to ground for
both the D+ and D- line (i.e., as measured by a Vector Network Analyzer
with 50
Ω probes—see Figure 52). Note that the series capacitors, CTX, are
optional for the return loss measurement.
Figure 51. Minimum Receiver Eye Timing and Voltage Compliance Specification
14.5.1
Compliance Test and Measurement Load
The AC timing and voltage parameters must be verified at the measurement point, as specified within 0.2
inches of the package pins, into a test/measurement load shown in Figure 52.
NOTE
The allowance of the measurement point to be within 0.2 inches of the
package pins is meant to acknowledge that package/board routing may
benefit from D+ and D– not being exactly matched in length at the package
pin boundary.
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