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| 型號： | MC8641HX1000JC |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROPROCESSOR, CBGA1023 |
| 封裝： | 33 X 33 MM, CERAMIC, BGA-1023 |
| 文件頁數(shù)： | 30/140頁 |
| 文件大小： | 1484K |
| 代理商： | MC8641HX1000JC |
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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
125
System Design Information
20.5
Connection Recommendations
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal
level. In general all unused active low inputs should be tied to OVDD, Dn_GVDD, LVDD, TVDD,
VDD_Coren, and VDD_PLAT, XVDD_SRDSn, and SVDD as required and unused active high inputs should
be connected to GND. All NC (no-connect) signals must remain unconnected.
Special cases:
DDR - If one of the DDR ports is not being used the power supply pins for that port can be
connected to ground so that there is no need to connect the individual unused inputs of that port to
ground. Note that these power supplies can only be powered up again at reset for functionality to
occur on the DDR port. Power supplies for other functional buses should remain powered.
Local Bus - If parity is not used, tie LDP[0:3] to ground via a 4.7 k
Ω resistor, tie LPBSE to OVDD
via a 4.7 k
Ω resistor (pull-up resistor). For systems which boot from Local Bus (GPCM)-controlled
flash, a pullup on LGPL4 is required.
SerDes - Receiver lanes configured for PCI Express are allowed to be disconnected (as would
occur when a PCI Express slot is connected but not populated). Directions for terminating the
SerDes signals is discussed in Section 20.5.1, “Guidelines for High-Speed Interface Termination.”
20.5.1
Guidelines for High-Speed Interface Termination
20.5.1.1
SerDes Interface
The high-speed SerDes interface can be disabled through the POR input cfg_io_ports[0:3] and through the
DEVDISR register in software. If a SerDes port is disabled through the POR input the user can not enable
it through the DEVDISR register in software. However, if a SerDes port is enabled through the POR input
the user can disable it through the DEVDISR register in software. Disabling a SerDes port through
software should be done on a temporary basis. Power is always required for the SerDes interface, even if
the port is disabled through either mechanism. Table 72 describes the possible enabled/disabled scenarios
for a SerDes port. The termination recommendations must be followed for each port.
Table 72. SerDes Port Enabled/Disabled Configurations
Disabled through POR input
Enabled through POR input
Enabled through DEVDISR
SerDes port is disabled (and cannot
be enabled through DEVDISR)
Complete termination required
(Reference Clock not required)
SerDes port is enabled
Partial termination may be required 1
(Reference Clock is required)
Disabled through DEVDISR
SerDes port is disabled (through
POR input)
Complete termination required
(Reference Clock not required)
SerDes port is disabled after software
disables port
Same termination requirements as
when the port is enabled through POR
input 2
(Reference Clock is required)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC8641HX1000K | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MC8641HX1000N | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications |
| MC8641HX1000NB | 功能描述:微處理器 - MPU G8 REV 2.0 0.95V 105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC8641HX1000NC | 功能描述:微處理器 - MPU G8 REV 2.1 0.95V 105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC8641HX1000NE | 功能描述:微處理器 - MPU G8 REV 3.0 0.95V 105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
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