參數(shù)資料
型號: MC8641DVU1250GC
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROPROCESSOR, CBGA1023
封裝: 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023
文件頁數(shù): 16/140頁
文件大?。?/td> 1484K
代理商: MC8641DVU1250GC
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
112
Freescale Semiconductor
Clocking
18.3
e600 to MPX clock PLL Ratio
Table 69 describes the clock ratio between the platform and the e600 core clock. This ratio is determined
by the binary value of LDP[0:3], LA[27](cfg_core_pll[0:4] - reset config name) at power up, as shown in
18.4
Frequency Options
18.4.1
SYSCLK to Platform Frequency Options
Table 70 shows some SYSCLK frequencies and the expected MPX frequency values based on the MPX
clock to SYSCLK ratio. Note that frequencies between 400 MHz and 500 MHz are NOT supported on the
0010
2:1
0011
3:1
0100
4:1
0101
5:1
0110
6:1
0111
Reserved
1000
8:1
1001
9:1
Table 69. e600 Core to MPX Clock Ratio
Binary Value of
LDP[0:3], LA[27] Signals
e600 core: MPX Clock Ratio
01000
2:1
01100
2.5:1
10000
3:1
11100
3.5:1
10100
4:1
01110
4.5:1
Table 68. MPX:SYSCLK Ratio
Binary Value of
LA[28:31]
Signals
MPX:SYSCLK Ratio
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