參數(shù)資料
型號(hào): MC8641DHX1500NB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROPROCESSOR, CBGA1023
封裝: 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023
文件頁數(shù): 95/140頁
文件大小: 1484K
代理商: MC8641DHX1500NB
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
58
Freescale Semiconductor
I
2C
12 I2C
This section describes the DC and AC electrical characteristics for the I2C interfaces of the MPC8641.
12.1
I2C DC Electrical Characteristics
Table 45 provides the DC electrical characteristics for the I2C interfaces.
12.2
I2C AC Electrical Specifications
Table 46 provides the AC timing parameters for the I2C interfaces.
Table 45. I2C DC Electrical Characteristics
At recommended operating conditions with OVDD of 3.3 V ± 5%.
Parameter
Symbol
Min
Max
Unit
Notes
Input high voltage level
VIH
0.7
× OVDD
OVDD +0.3
V
Input low voltage level
VIL
–0.3
0.3
× OVDD
V
Low level output voltage
VOL
00.2
× OVDD
V1
Pulse width of spikes which must be suppressed
by the input filter
tI2KHKL
050
ns
2
Input current each I/O pin (input voltage is
between 0.1
× OVDD and 0.9 × OVDD(max)
II
–10
10
μA3
Capacitance for each I/O pin
CI
—10
pF
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. Refer to the
MPC8641 Integrated Host Processor Reference Manual for information on the digital filter used.
3. I/O pins will obstruct the SDA and SCL lines if OVDD is switched off.
Table 46. I2C AC Electrical Specifications
All values refer to VIH (min) and VIL (max) levels (see Table 45).
Parameter
Symbol 1
Min
Max
Unit
SCL clock frequency
fI2C
0400
kHz
Low period of the SCL clock
tI2CL
4
1.3
μs
High period of the SCL clock
tI2CH
4
0.6
μs
Setup time for a repeated START condition
tI2SVKH
4
0.6
μs
Hold time (repeated) START condition (after this period, the
first clock pulse is generated)
tI2SXKL
4
0.6
μs
Data setup time
tI2DVKH
4
100
ns
Data input hold time:
CBUS compatible masters
I2C bus devices
tI2DXKL
0 2
μs
Rise time of both SDA and SCL signals
tI2CR
20 + 0.1 CB
5
300
ns
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