參數(shù)資料
型號: MC8640VU1250HC
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 1250 MHz, MICROPROCESSOR, CBGA1023
封裝: 33 X 33 MM, ROHS COMPLIANT, CERAMIC, FCBGA-1023
文件頁數(shù): 103/130頁
文件大?。?/td> 1495K
代理商: MC8640VU1250HC
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
74
Freescale Semiconductor
PCI Express
additional margin to adequately compensate for the degraded minimum Rx eye diagram (shown in
Figure 51) expected at the input receiver based on some adequate combination of system simulations and
the return loss measured looking into the Rx package and silicon. The Rx eye diagram must be aligned in
time using the jitter median to locate the center of the eye diagram.
The eye diagram must be valid for any 250 consecutive UIs.
A recovered TX UI is calculated over 3500 consecutive unit intervals of sample data. The eye diagram is
created using all edges of the 250 consecutive UI in the center of the 3500 UI used for calculating the TX
UI.
NOTE
The reference impedance for return loss measurements is 50
Ω to ground for
both the D+ and D– line (that is, as measured by a vector network analyzer
with 50-
Ω probes—see Figure 52). Note that the series capacitors, CTX, are
optional for the return loss measurement.
Figure 51. Minimum Receiver Eye Timing and Voltage Compliance Specification
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