7
7734Q–AVR–02/12
AT90PWM81/161
2.1.4
Port D (PD7..PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port D also serves the functions of various special features of the AT90PWM81/161 as listed on
2.1.5
Port E (P32..0) RESET/XTAL1/XTAL2/AREF
Port E is an 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port E output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port E pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port E pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
If the RSTDISBL Fuse is programmed, PE0 is used as an I/O pin. Note that the electrical char-
acteristics of PE0 differ from those of the other pins.
If the RSTDISBL Fuse is unprogrammed, PE0 is used as a Reset input. A low level on this pin
for longer than the minimum pulse length will generate a Reset, even if the clock is not running.
to generate a Reset.
Depending on the clock selection fuse settings, PE1 can be used as input to the inverting Oscil-
lator amplifier and input to the internal clock operating circuit.
Depending on the clock selection fuse settings, PE2 can be used as output from the inverting
Oscillator amplifier.
2.1.6
AV
CC
AV
CC is the supply voltage pin for the A/D converter. It should be externally connected to VCC,
even if the ADC is not used. If the ADC is used, it should be connected to V
CC through a low-
pass filter.