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參數(shù)資料
| 型號： | MC75HC107 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Dual J-K Flip-Flop with Reset |
| 中文描述： | 雙JK觸發(fā)器與復位觸發(fā)器 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 171K |
| 代理商： | MC75HC107 |
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
High–Performance Silicon–Gate CMOS
The MC74HC107 is identical in pinout to the LS107. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
Each flip flops negative edge clocked and has an active–low asynchro-
nous reset.
The HC107 is identical in function to the HC73, but has a different pinout.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1
μ
A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 92 FETs or 23 Equivalent Gates
LOGIC DIAGRAM
PIN 14 = VCC
PIN 7 = GND
RESET 2
K2
CLOCK 2
J2
RESET 1
K1
CLOCK 1
J1
Q2
Q2
Q1
Q1
1
12
4
13
8
9
11
10
3
2
5
6
FUNCTION TABLE
PIN ASSIGNMENT
Inputs
Clock
Q
Reset
J
K
Q
L
H
H
H
H
H
H
H
X
X
L
L
H
H
X
X
X
X
L
H
L
H
X
X
X
L
H
No Change
L
H
Toggle
No Change
No Change
No Change
H
L
L
H
K1
Q1
Q1
J1
11
12
13
14
8
9
10
5
4
3
2
1
7
6
RESET 2
K2
CLOCK 1
RESET 1
VCC
J2
CLOCK 2
GND
Q2
Q2
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
1
14
1
14
ORDERING INFORMATION
MC74HCXXXN
MC74HCXXXD
Plastic
SOIC
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