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參數(shù)資料
型號(hào): MC74HCT366ADR2G
廠商: ON Semiconductor
文件頁(yè)數(shù): 3/7頁(yè)
文件大?。?/td> 0K
描述: IC BUFFER INV HEX 3ST 16-SOIC
標(biāo)準(zhǔn)包裝: 2,500
系列: 74HCT
邏輯類型: 逆變器,緩沖器
電路數(shù): 6
輸入數(shù): 1
特點(diǎn): 三態(tài)
電源電壓: 2 V ~ 6 V
電流 - 靜態(tài)(最大值): 4µA
輸出電流高,低: 7.8mA,7.8mA
邏輯電平 - 低: 0.8V
邏輯電平 - 高: 2V
額定電壓和最大 CL 時(shí)的最大傳播延遲: 20ns @ 6V,50pF
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 16-SOIC
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
包裝: 帶卷 (TR)
MC74HCT366A
http://onsemi.com
3
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
Vin
DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
Vout
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
Iin
DC Input Current, per Pin
± 20
mA
Iout
DC Output Current, per Pin
± 25
mA
ICC
DC Supply Current, VCC and GND Pins
± 50
mA
PD
Power Dissipation in Still Air,
SOIC Package
TSSOP Package
500
450
mW
Tstg
Storage Temperature
– 65 to + 150
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, Vout
DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
– 55
+ 125
_C
tr, tf
Input Rise and Fall Time
VCC = 2.0 V
(Figure 1)
VCC = 3.0 V
VCC = 4.5 V
VCC = 6.0 V
0
1000
600
500
400
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not
implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may
affect device reliability.
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Parameter
Test Conditions
VCC
V
Guaranteed Limit
Unit
– 55 to
25_C
v 85_C
v 125_C
VIH
Minimum HighLevel Input
Voltage
Vout = VCC – 0.1 V
|Iout| v 20 μA
4.5
to
5.5
2.0
V
VIL
Maximum LowLevel Input
Voltage
Vout = 0.1 V
|Iout| v 20 μA
4.5
to
5.5
0.80
V
VOH
Minimum HighLevel Output
Voltage
Vin = VIH
|Iout| v 20 μA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin = VIH
|Iout| v 3.6 mA
|Iout| v 6.0 mA
|Iout| v 7.8 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
VOL
Maximum LowLevel Output
Voltage
Vin = VIL
|Iout| v 20 μA
2.0
4.5
6.0
0.1
V
Vin = VIL
|Iout| v 3.6 mA
|Iout| v 6.0 mA
|Iout| v 7.8 mA
3.0
4.5
6.0
0.26
0.33
0.40
Iin
Maximum Input Leakage Current Vin = VCC or GND
6.0
± 0.1
± 1.0
μA
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
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